W90P710_05 Datasheet, PDF (159/526 Pages) Winbond – 16/32-bit ARM microcontroller

W90P710
Continued.
CONFIG
6’h06
6’h08
6’h0A
6’h0C
6’h0E
6’h10
6’h12
6’h14
SIGNALS
R0_PTLE, RxStart, SFD, WasSFD,
RxFrame, WrByte, Rx_OvFlow, 1’b0,
R0_RBC [7:0]
Reserved
OUT [7:6], RegMISTA_Rx_W,
RXERR_sync, R0_CRCE,
R0_PTLE, R0_RP,
RegMISTA_Tx_W, T0_EXDEF,
T0_TXABT,
T0_CCNT [3:0], 2’b00
OUT [7:6], FrameWPtr [1:0],
FrameRPtr [1:0], RFF_One,
FrameWPtr_Inc, FrameRPtr_Inc,
Rounding, NexPktStartPtr [5:0]
R0_CRCE, Rx_OvFlow, R0_MRE,
CRCERR,
DAMATCH, RxFrame, SFD,
RxMIIErr,
SynStart, Hi_Lo_Syn,
New_DataValid,
L_RxFrame, RxStart, DataValid,
Hi_Lo,
RX_DV_In
WRITE, RFF_CS [7:1], RFF_WPTR
[5:0],
RXERR_sync, RxReuse
OUT [6], TXSTART, TX_START,
DMode_TFF_CS [4:0],
TXSTART_Set,
TXSTART_Clr, TXSTART_Re_Set,
FrameWaiting, Deferring, COL,
TXCOL,
TXCOL_sync
OUT [6], READ, READ_sync,
READ_Mask,
ReadMask_sync, TFF_RPTR [5:0],
DMode_TFF_CS [4:0]
CONFIG
6’h07
6’h09
6’h0B
6’h0D
6’h0F
6’h11
6’h13
6’h15
SIGNALS
R0_CRCE, RX_DV_In, SynStart,
R0_DB,
Rx_OvFlow, WRITECTR [2:0],
RxByte [7:0]
Reserved
OUT [7:6], MCMDR_SDPZ_Clr,
RegMCMDR_SDPZ_Clr,
DMode_Pause_CS [3:0], MacCtlFra,
PauseFra, PauseTx,
MacCtlFra_sync, PauseFra_sync,
PAUSE,
Pause_en, FDUP
OUT [7:6], ARB_REQ_Set,
ARB_REQ_Clr,
DMode_ARB_CS [2:0], TransDone,
GrantLost, TransCtrExpire,
Trans_CTR [4:0], BURST
OUT [6], WRITE, RFF_WPTR [5:0],
RxReuse, RxBuf_ACK, RFF_RPTR
[5:0]
OUT [6], TX_CLK, TX_EN, TXD [3:0],
RX_CLK, RX_DV, RX_ER, RXD [3:0],
CRS,
COL
OUT [6], DMode_TxBuf_CS[6:0],
DMode_TFF_CS[4:0], TXFIFO_UF,
TXFIFO_HT, TXOK_sync
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Publication Release Date: January 17, 2005
Revision A.2