M16C6K9 Datasheet, PDF (98/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
Serial I/O
(UART0)
RxD0
Clock source selection
f1
f8
Bit rate generator
Internal _{(address 03A116)}
f32
1 / (n0+1)
External
UART reception
1/16
Clock synchronous type
Reception
control circuit
UART transmission
1/16
Clock synchronous type
Transmission
control circuit
Clock synchronous type
(when internal clock is selected)
1/2
CLK0
CTS0 / RTS0
Clock synchronous type
(when internal clock is selected)
CLK
polarity
switching
circuit
CTS/RTS disabled
CTS/RTS selected
Vcc
CTS/RTS disabled
CTS/RTS separated
Clock synchronous type
(when external clock is
selected)
RTS0
CTS0
CTS0 from UART1
Receive
clock
Transmit
clock
Transmit/
receive
unit
(UART1)
RxD1
Clock source selection
f1
Bit rate generator
f8
Internal (address 03A916)
f32
1 / (n1+1)
External
UART reception
1/16
Clock synchronous type
Reception
control circuit
UART transmission
1/16
Clock synchronous type
Clock synchronous type
(when internal clock is selected)
1/2
Transmission
control circuit
Receive
clock
Transmit
clock
Transmit/
receive
unit
CLK1
CTS1 / RTS1
/ CTS0 / CLKS1
CLK
polarity
switching
circuit
Clock synchronous type
(when internal clock is selected)
Clock synchronous type
(when external clock is
selected)
CTS/RTS disabled
CTS/RTS separated
RTS1
Clock output pin
select switch
VCC
CTS/RTS disabled
CTS1
CTS0
CTS0 to UART0
(UART2)
RxD2
RxD polarity
switching circuit
Clock source selection
f1
Internal
f8
f32
Bit rate generator
(address 037916)
1 / (n2+1)
External
UART reception
1/16
Clock synchronous type
Reception
control circuit
UART transmission
1/16
Clock synchronous type
Transmission
control circuit
Clock synchronous type
(when internal clock is selected)
1/2
Receive
clock
Transmit
clock
Transmit/
receive
unit
TxD
polarity
switching
circuit
CLK2
CTS2 / RTS2
CLK
polarity
switching
circuit
Clock synchronous type
(when internal clock is selected)
CTS/RTS _{CTS/RTS disabled}
selected
Clock synchronous type
(when external clock is
selected)
RTS2
Vcc
CTS/RTS disabled
CTS2
n0 : Values set to UART0 bit rate generator (BRG0)
n1 : Values set to UART1 bit rate generator (BRG1)
n2 : Values set to UART2 bit rate generator (BRG2)
Fig.GA-1 Block diagram of UARTi (i = 0 to 2)
TxD0
TxD1
TxD2
Rev.1.00 Jun 06, 2003 page 98 of 290