M16C6K9 Datasheet, PDF (91/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
Timer B
Timer B
Fig.FB-14 shows the block diagram of timer B. Fig.FB-15 and FB-16 show the timer B-related registers.
Use the timer Bi mode register (i = 0 to 5) bits 0 and 1 to choose the desired mode.
Timer B has three operation modes listed as follows:
• Timer mode: The timer counts an internal count source.
• Event counter mode: The timer counts pulses from an external source or a timer overflow.
• Pulse period/pulse width measuring mode: The timer measures an external signal's pulse period or
pulse width.
Data bus high-order bits
Clock source selection
f1
f8
f32
fC32
• Timer
• Pulse period/pulse width measurement
• Event counter
Data bus low-order bits
Low-order 8 bits
Reload register (16)
High-order 8 bits
Counter (16)
TBiIN
(i = 0 to 5)
Polarity switching
and edge pulse
Count start flag
(address 038016)
Can be selected in only
event counter mode
TBj overflow
(j = i – 1. Note, however,
j = 2 when i = 0,
j = 5 when i = 3)
Fig.FB-14 Block diagram of timer B
Counter reset circuit
TBi
Timer B0
Timer B1
Timer B2
Timer B3
Timer B4
Timer B5
Address
039116 039016
039316 039216
039516 039416
035116 035016
035316 035216
035516 035416
TBj
Timer B2
Timer B0
Timer B1
Timer B5
Timer B3
Timer B4
Timer Bi mode register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
Address
TBiMR(i = 0 to 5) 039B16 to 039D16
035B16 to 035D16
When reset
00XX00002
00XX00002
Bit symbol
TMOD0
TMOD1
Bit name
Operation mode selection
bits
Function
b1 b0
0 0 : Timer mode
0 1 : Event counter mode
1 0 : Pulse period/pulse width
measurement mode
1 1 : Inhibited
MR0
MR1
MR2
Function varies with each operation mode
MR3
TCK0
TCK1
Count source selection bits
(Function varies with each operation mode)
Note 1: Timer B0, timer B3.
Note 2: Timer B1, timer B2, timer B4, timer B5.
Fig.FB-15 Timer B-related registers (1)
RW
(Note 1)
(Note 2)
Rev.1.00 Jun 06, 2003 page 91 of 290