M16C6K9 Datasheet, PDF (269/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
CPU Reprogram Mode
Status register
The status register shows the operation status of the flash memory and whether program and erase operations
end successfully or not. It can be read in the following conditions.
(1) By reading an arbitrary address from the user ROM area after issuing the read status register command
(7016)
(2) By reading an arbitrary address from the user ROM area in the period from the start of program or erase
operation to the execution of read array command (FF16).
Table BB-2 shows the status register.
The status register can be cleared in the following condition.
(1) By issuing the clear status register command (5016).
(2) After reset, the status register is set to “8016”.
Each bit of the register is shows below.
Sequencer status (SR7)
After power-on, the sequencer status is set to “1” (ready).
The bit is set to “0” (busy) during program and erase operations and is set to “1” upon the completion of these
operations.
Erase status (SR5)
Erase status indicates the status of erase operation. When erase error occurs, it is set to “1”.
The bit becomes “0” when it is cleared.
Program status (SR4)
Program status indicates the status of program operation. When program error occurs, it is set to “1”.
The bit becomes “0” when it is cleared.
If “1” is set to SR5 or SR4, the program and block erase operations are not accepted. Before execution of
these commands, it is necessary to execute the clear status register command (5016) to clear the status
register.
If any S/W commands are not correct, both the SR5 and SR4 are set to “1”.
Rev.1.00 Jun 06, 2003 page 269 of 290