M16C6K9 Datasheet, PDF (106/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
Serial I/O
Clock synchronous serial I/O mode
(1) Clock synchronous serial I/O mode
The clock synchronous serial I/O mode uses a transfer clock to transmit and receive data. Tables.GA-2 and
GA-3 list the specifications of the clock synchronous serial I/O mode. Fig.GA-9 shows the UARTi transmit/
receive mode register.
Table.GA-2 Specifications of clock synchronous serial I/O mode (1)
Item
Specification
Transfer data format
• Transfer data length: 8 bits
Transfer clock
• When internal clock is selected (bit 3 at addresses 03A016, 03A816, 037816
= “0”) : fi/ 2(n+1) (Note 1) fi = f1, f8, f32
• When external clock is selected (bit 3 at addresses 03A016, 03A816, 037816
= “1”) : Input from CLKi pin
_______
_______
_______ _______
Transmission/reception control • Selecting from CTS function/RTS function/Disable CTS, RTS function
Transmission start condition
• To start transmission, the following requirements must be met:
_ _{Transmit enable bit (bit 0 at addresses 03A516, 03AD16, 037D16) = “1”}
_ _{Transmit buffer empty flag (bit 1 at addresses 03A516, 03AD16, 037D16) = “0”}
_______
_______
_ _{When CTS function selected, CTS input level = “L”}
• Furthermore, if external clock is selected, the following requirements must also be met:
_ _{CLKi polarity select bit (bit 6 at addresses 03A416, 03AC16, 037C16) = “0”:}
CLKi input level = “H”
_ _{CLKi polarity select bit (bit 6 at addresses 03A416, 03AC16, 037C16) = “1”:}
CLKi input level = “L”
Reception start condition
• To start reception, the following requirements must be met:
_ _{Receive enable bit (bit 2 at addresses 03A516, 03AD16, 037D16) = “1”}
_ _{Transmit enable bit (bit 0 at addresses 03A516, 03AD16, 037D16) = “1”}
_ _{Transmit buffer empty flag (bit 1 at addresses 03A516, 03AD16, 037D16) = “0”}
• Furthermore, if external clock is selected, the following requirements must
also be met:
_ _{CLKi polarity select bit (bit 6 at addresses 03A416, 03AC16, 037C16) = “0”:}
CLKi input level = “H”
_ _{CLKi polarity select bit (bit 6 at addresses 03A416, 03AC16, 037C16) = “1”:}
CLKi input level = “L”
Interrupt request
generation timing
• When transmitting
_ _{Transmit interrupt factor selection bits (bits 0, 1 at address 03B016, bit 4 at}
address 037D16) = “0”: At the completion of data transmission from UARTi
transfer buffer register to UARTi transmit register
_ _{Transmit interrupt factor selection bits (bits 0, 1 at address 03B016, bit 4 at}
address 037D16) = “1”: At the completion of data transmission from
UARTi transfer register is completed
• When receiving
_ _{At the completion of data transferring from UARTi receive register to}
UARTi receive buffer register
Error detection
• Overrun error (Note 2)
This error occurs when the next data is ready before contents of UARTi
receive buffer register are read out
Note 1: “n” denotes the value 0016 to FF16 that is set to the UART bit rate generator.
Note 2: If an overrun error occurs, the UARTi receive buffer will have the next data written in. Note also that
the UARTi receive interrupt request bit is not set to “1”.
Rev.1.00 Jun 06, 2003 page 106 of 290