M16C6K9 Datasheet, PDF (173/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
Serial Interrupt Output
•OBF0 mergence function
By setting the bit to “1”, the signal, which is logically OR by OBF00 and OBF01 signals from LPC
bus interface, will output to IRQ1 and IRQ12 of serial interrupt circuit.
With the function, the IRQ1 and IRQ12 request bits can be cleared simultaneously by H/W at the
read of output data buffer from system if both IRQ1 and IRQ12 request bits are set in the case
that IRQ1 request bit (or IRQ12 request bit) is set after that of IRQ12 (or IRQ1) because of the
overwrite to the output data buffer.
•OBF0 sync inhabitant function
By setting bit 4 of serial interrupt control register 1 (OBF cut sync bit), simultaneously after the
read of OBF0, the OBF0 sync function can be inhabited.
If the bit is set to “1”, simultaneously after the clear of OBF00 or OBF01, SEN00 (OBF00 sync
enable bit) and SEN01 (OBF01 sync enable bit) bits are cleared (sync inhabitation) by H/W.
The configuration of serial interrupt control register 1 and the switching circuit controlled by
OBF0MRG, OBF0CLR are shown in Fig. SI-5, Fig. SI-6 respectively.
OBF0 ^OBF0
OBF0 clear signal
(Triggered by host read)
OBF0SEL
OBF0CLR
OBF0MRG
“0”
RD/WR
RD
SEN00
OBF0001 _WR
IR0
“1”
“0”
RD/WR
SEN01
OBF0001
WR
“1”
IR0
RD
Fig.SI-6 The switching circuit controlled by OBF0MRG, OBF0CLR
To IRQ1 request bit of
serial interrupt circuit
To IRQ12 request bit of
serial interrupt circuit
Rev.1.00 Jun 06, 2003 page 173 of 290