M16C6K9 Datasheet, PDF (26/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
SFR
038016
038116
038216
038316
038416
038516
038616
038716
038816
038916
038A16
038B16
038C16
038D16
038E16
038F16
039016
039116
039216
039316
039416
039516
039616
039716
039816
039916
039A16
039B16
039C16
039D16
039E16
039F16
03A016
03A116
03A216
03A316
03A416
03A516
03A616
03A716
03A816
03A916
03AA16
03AB16
03AC16
03AD16
03AE16
03AF16
03B016
03B116
03B216
03B316
03B416
03B516
03B616
03B716
03B816
03B916
03BA16
03BB16
03BC16
03BD16
03BE16
03BF16
Count start flag (TABSR)
Clock prescaler reset flag (CPSRF)
One-shot start flag (ONSF)
Trigger select register (TRGSR)
Up-down flag (UDF)
TimerA0 (TA0)
TimerA1 (TA1)
TimerA2 (TA2)
TimerA3 (TA3)
TimerA4 (TA4)
TimerB0 (TB0)
TimerB1 (TB1)
TimerB2 (TB2)
TimerA0 mode register (TA0MR)
TimerA1 mode register (TA1MR)
TimerA2 mode register (TA2MR)
TimerA3 mode register (TA3MR)
TimerA4 mode register (TA4MR)
TimerB0 mode register (TB0MR)
TimerB1 mode register (TB1MR)
TimerB2 mode register (TB2MR)
UART0 transmit/receive mode register (U0MR)
UART0 communication speed register (U0BRG)
UART0 tranmit buffer register (U0TB)
UART0 transmit/receive control register0 (U0C0)
UART0 transmit/receive control register1 (U0C1)
UART0 receive buffer register (U0RB)
UART1 transmit/receive mode register (U1MR)
UART1 communication speed register (U1BRG)
UART1 tranmit buffer register (U1TB)
UART1 transmit/receive control register0 (U1C0)
UART1 transmit/receive control register1 (U1C1)
UART1 receive buffer register (U1RB)
UART transmit/receive control register2 (UCON)
Flash memory recognition register (FMRR)
Flash memory control register (FMCR)
DMA0 request cacse select register (DM0SL)
DMA1 request cacse select register (DM1SL)
03C016
03C116
03C216
03C316
03C416
03C516
03C616
03C716
03C816
03C916
03CA16
03CB16
03CC16
03CD16
03CE16
03CF16
03D016
03D116
03D216
03D316
03D416
03D516
03D616
03D716
03D816
03D916
03DA16
03DB16
03DC16
03DD16
03DE16
03DF16
03E016
03E116
03E216
03E316
03E416
03E516
03E616
03E716
03E816
03E916
03EA16
03EB16
03EC16
03ED16
03EE16
03EF16
03F016
03F116
03F216
03F316
03F416
03F516
03F616
03F716
03F816
03F916
03FA16
03FB16
03FC16
03FD16
03FE16
03FF16
A-D register0 (AD0)
A-D register1 (AD1)
A-D register2 (AD2)
A-D register3 (AD3)
A-D register4 (AD4)
A-D register5 (AD5)
A-D register6 (AD6)
A-D register7 (AD7)
A-D control register2 (ADCON2)
A-D control register0 (ADCON0)
A-D control register1 (ADCON1)
D-A register0 (DA0)
D-A register1 (DA1)
D-A control register (DACON)
Comparator control register (CMPCON)
Comparator data register (CMPD)
Port P0 (P0)
Port P1 (P1)
Port P0 direction register (P0D)
Port P1 direction register (P1D)
Port P2 (P2)
Port P3 (P3)
Port P2 direction register (P2D)
Port P3 direction register (P3D)
Port P4 (P4)
Port P5 (P5)
Port P4 direction register (P4D)
Port P5 direction register (P5D)
Port P6 (P6)
Port P7 (P7)
Port P6 direction register (P6D)
Port P7 direction register (P7D)
Port P8 (P8)
Port P9 (P9)
Port P8 direction register (P8D)
Port P9 direction register (P9D)
Port P10 (P10)
Port P10 direction register (P10D)
Pull-up control register0 (PUR0)
Pull-up control register1 (PUR1)
Pull-up control register2 (PUR2)
Port control register0 (PCR0)
Note 1: The areas that nothing are allocated in SFR are reserved. Read and Write to the areas are inhibited.
Fig.CA-5 Location of peripheral unit control registers (4)
Rev.1.00 Jun 06, 2003 page 26 of 290