M16C6K9 Datasheet, PDF (138/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
A-D Converter
(4) Repeat sweep mode 0
In repeat sweep mode 0, the pins selected using the A-D sweep pin selection bits are used for repeat sweep
A-D conversion. Table.JA-5 shows the specifications of repeat sweep mode 0. Fig.JA-7 shows the A-D
control register in repeat sweep mode 0.
Table.JA-5 Repeat sweep mode 0 specifications
Item
Specification
Function
Start condition
The pins selected by the A-D sweep pin selection bits are used for repeat sweep A-D conversion
Writing “1” to A-D conversion start flag
Stop condition
Writing “0” to A-D conversion start flag
Interrupt request generation timing Not generated
Input pin
AN0 and AN1 (2 pins), AN0 to AN3 (4 pins), AN0 to AN5 (6 pins), or AN0 to AN7 (8 pins)
Reading of result of A-D converter Read A-D registers corresponding to selected pins (at any time)
A-D control register 0 (Note)
b7 b6 b5 b4 b3 b2 b1 b0
11
Symbol
ADCON0
Address
03D616
When reset
00000XXX2
Bit symbol
Bit name
Function
CH0
Analog input pin selection bits Invalid in repeat sweep mode 0
RW
CH1
CH2
MD0
MD1
b4 b3
A-D operation mode selection _{1 1 : Repeat sweep mode 0}
bits 0
TRG
Trigger selection bit
ADST A-D conversion start flag
CKS0 Frequency selection bit 0
0 : Software trigger
1 : ADTRG trigger
0 : A-D conversion disabled
1 : A-D conversion started
0 : FAD/4 selected
1 : FAD/2 selected
Note: If the A-D control register is rewritten during A-D conversion, the conversion result
is indeterminate.
A-D control register 1 (Note 1)
b7 b6 b5 b4 b3 b2 b1 b0
1
0
Symbol
ADCON1
Address
03D716
When reset
0016
Bit symbol
Bit name
Function
RW
SCAN0
SCAN1
A-D sweep pin selection bits When single sweep and repeat sweep mode 0
are selected
b1 b0
0 0 : AN0, AN1 (2 pins)
0 1 : AN0 to AN3 (4 pins)
1 0 : AN0 to AN5 (6 pins)
1 1 : AN0 to AN7 (8 pins)
MD2
BITS
CKS1
A-D operation mode
selection bits 1
8/10-bit mode selection bit
Frequency selection bit 1
Should be "0" in this mode
0 : 8-bit mode
1 : 10-bit mode
0 : FAD/2 or FAD/4 selected
1 : FAD selected
VCUT Vref connect bit
1 : Vref connected
OPA0
OPA1
ANEX0,1 selection bis
b7 b6
0 0 : ANEX0 and ANEX1 are not used
0 1 : ANEX0 input is A-D converted
1 0 : ANEX1 input is A-D converted
1 1 : Inhibited
Note 1: If the A-D control register is rewritten during A-D conversion, the conversion result
is indeterminate.
Fig.JA-7 A-D conversion register in repeat sweep mode 0
Rev.1.00 Jun 06, 2003 page 138 of 290