M16C6K9 Datasheet, PDF (199/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
MULTI-MASTER I²C-BUS Interface
START Condition Generation Method
When ES0 bit of the I²C control register is “1” and the BB flag of I²C status register is “0”, writing “1” to the
MST, TRX, and BB bits and “0” to the PIN and low-order 4 bits of the I²C status register (address 032816,
033816, 031816) simultaneously enters the standby status to generate the start condition. The start condition
is generated after writing slave address data to the I²C data shift register. After that, the bit counter becomes
“0002” and 1 byte SCL are output. The START condition generation timing is different in the standard clock
mode and the high-speed clock mode. Refer to Fig.GC-17 the START condition generation timing diagram,
and Table GC-9 the START condition generation timing table.
Interrupt disable
No
BB=0?
Yes
S1i=E016
Start condition standby status setting
S0i=Data
Start condition trigger occur.
✼ Data=Slave address data
Interrupt enable
Fig.GC-15 Start condition generation flow chart
Rev.1.00 Jun 06, 2003 page 199 of 290