M16C6K9 Datasheet, PDF (136/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
A-D Converter
(2) Repeat mode
In repeat mode, the pin selected using the analog input pin selection bits is used for repeated A-D conver-
sion. Table.JA-3 shows the specifications of repeat mode. Fig.JA-5 shows the A-D control register in repeat
mode.
Table.JA-3 Repeat mode specifications
Item
Function
Star condition
Stop condition
Interrupt request generation timing
Input pin
Reading of result of A-D converter
Specification
The pin selected by the analog input pin selection bits is used for repeated A-D conversion
Writing “1” to A-D conversion start flag
Writing “0” to A-D conversion start flag
Not generated
One of AN0 to AN7, as selected
Read A-D register corresponding to selected pin
A-D control register 0 (Note 1)
b7 b6 b5 b4 b3 b2 b1 b0
01
Symbol
ADCON0
Address
03D616
When reset
00000XXX2
Bit symbol
CH0
CH1
CH2
Bit name
Analog input pin selection
bits
Function
b2 b1 b0
0 0 0 : AN0 is selected
0 0 1 : AN1 is selected
0 1 0 : AN2 is selected
0 1 1 : AN3 is selected
1 0 0 : AN4 is selected
1 0 1 : AN5 is selected
1 1 0 : AN6 is selected
1 1 1 : AN7 is selected
RW
(Note 2)
MD0
MD1
TRG
ADST
CKS0
A-D operation mode
selection bits 0
Trigger selection bit
A-D conversion start flag
Frequency selection bit 0
b4 b3
0 1 : Repeat mode
0 : Software trigger
1 : ADTRG trigger
0 : A-D conversion disabled
1 : A-D conversion started
0 : FAD/4 selected
1 : FAD/2 selected
(Note 2)
Note 1: If the A-D control register is rewritten during A-D conversion, the conversion
result is indeterminate.
Note 2: When changing A-D operation mode, set analog input pin again.
A-D control register 1 (Note)
b7 b6 b5 b4 b3 b2 b1 b0
1
0
Symbol
ADCON1
Address
03D716
When reset
0016
Bit symbol
Bit name
Function
RW
SCAN0
SCAN1
A-D sweep pin selection Invalid in repeat mode
bits
MD2
BITS
CKS1
VCUT
A-D operation mode
selection bit 1
Should be “0” in this mode
8/10-bit mode selection
bit
Frequency selection bit 1
0 : 8-bit mode
1 : 10-bit mode
0 : FAD/2 or FAD/4 selected
1 : FAD selected
Vref connect bit
1 : Vref connected
OPA0
OPA1
ANEX0,1 selection bis
b7 b6
0 0 : ANEX0 and ANEX1 are not used
0 1 : ANEX0 input is A-D converted
1 0 : ANEX1 input is A-D converted
1 1 : Inhibited
Note: If the A-D control register is rewritten during A-D conversion, the conversion
result is indeterminate.
Fig.JA-5 A-D conversion register in repeat mode
Rev.1.00 Jun 06, 2003 page 136 of 290