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M16C6K9 Datasheet, PDF (171/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
M16C/6K9 Group
Serial Interrupt Output
q Serial interrupt control register0 SERCON0
The operation condition of serial interrupt is set.
•OBFi sync enable bit SENi (i=00,01,1-3)
By setting the bit to “1”, sync with the OBFi of host interface, the serialized interrupt can be
generated.
•Clock stop inhibition bit SUPEN
Setting the bit to “1” will request the inhibition of clock if the clock tends to stop or slow down in
serial interrupt request.
•Clock restart enable bit RUNEN
Setting the bit to “1” requests the clock restart during the clock stop or clock slow down in serial
interrupt request.
•Serial interrupt enable bit IRQEN
__________ _______________
0: SERIRQ, PRST, CLKRUN are I/O ports.
__________ _______________
1: SERIRQ, PRST, CLKRUN are serial interrupt function ports.
Serial interrupt control register0
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
SERCON0
Address When reset
02B016
0016
Bit symbol
Bit name
SEN00 OBF00 sync enable bit
SEN01 OBF01 sync enable bit
SEN1 OBF1 sync enable bit
SEN2 OBF2 sync enable bit
SEN3 OBF3 sync enable bit
SUPEN Clock stop inhibition bit
RUNEN Clock restart enable bit
IRQEN Serial interrupt enable bit
(Note 1)
Function
0: Sync inhibition
1: Sync enable
RW
0: Sync inhibition
1: Sync enable
0: Sync inhibition
1: Sync enable
0: Sync inhibition
1: Sync enable
0: Sync inhibition
1: Sync enable
0: Stop control operation
1: No stop control operation
0: No clock restart
1: Clock restart
0: Serial interrupt inhibition
1: Serial interrupt enable
_______________
Note 1 : When IRQEN is set to “1”, if either SUPEN or RUNEN is set to “1”, P46 will function as CLKRUN I/O and the output type
is N channel open drain.
__________
__________
Note 2 : When the bit is set to “1”, P43, P45 function as SERIRQ, PRST respectively. Even the bit is set to “1”, P45/PRST can
function as GPIO if bit 1 of serial interrupt control register 1 (address 02B116) is set to “1”.
Fig.SI-4 Configuration of serial interrupt control register0
Rev.1.00 Jun 06, 2003 page 171 of 290