M16C6K9 Datasheet, PDF (218/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
PS2 Interface
q PS2 mode register
• Sampling clock selection bits (SCK0,1)
These two bits select clock frequency for sampling PS2 clock (CLK) and PS2 data (DAT).
The relation between main clock (XIN) and sampling cycle is shown in table below.
XIN
Setting value
8MHz
5MHz
1/4
0.5µ
0.8µ
1/8
1.0µ
1.6µ
1/16
2.0µ
3.2µ
1/32
4.0µ
6.4µ
✽Sampling clock , which samples each line periodically, is used for avoiding the reflection from
each line. The sampling clock will be delayed by internal circuit around 1 cycle. Thus, set the
samplingclock as fast as possible.
• Pin selection bit (PSEL)
This bit is for selecting PS2 clock (CLK) or PS2 data (DAT) to connect to PS2Bi (i=0 to 2) .PS2Bi are external
interrupt input pins. The bit setting definition is shown in table below.
Pin selection bit
“0”
“1”
PS2Bi (i= 0 to 2)
PS2 clock (CLK)
PS2 data (DAT)
• PS2 interface enable bit (PSEN)
The PS2Ai (i= 0 to 2) and PS2Bi (i= 0 to 2) will be disconnected to hardware PS2 control section and become
GPIO port when the bit is “0”.
The PS2Ai and PS2Bi will be connected to hardware PS2 control section when this bit is “1”.
Rev.1.00 Jun 06, 2003 page 218 of 290