M16C6K9 Datasheet, PDF (42/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
Interrupt
Hardware Interrupts
Hardware interrupts are classified into two types — special interrupts and peripheral I/O interrupts.
(1) Special interrupts
Special interrupts are non-maskable interrupts.
• Reset
____________
Reset occurs if an “L” is input to the RESET pin.
_______
• NMI interrupt
_______
_______
An NMI interrupt occurs if an “L” is input to the NMI pin.
________
• DBC interrupt
This interrupt is exclusively for the debugger, do not use it in other circumstances.
• Watchdog timer interrupt
Generated by the watchdog timer.
• Single-step interrupt
This interrupt is exclusively for the debugger, do not use it in other circumstances. With the debug flag (D
flag) set to “1”, a single-step interrupt occurs after one instruction is executed.
• Address match interrupt
An address match interrupt occurs immediately before the instruction held in the address indicated by the
address match interrupt register is executed with the address match interrupt enable bit set to “1”.
If an address other than the first address of the instruction in the address match interrupt register is set, no
address match interrupt occurs.
(2) Peripheral I/O interrupts
A peripheral I/O interrupt is generated by one of built-in peripheral functions. Built-in peripheral functions are
dependent on classes of products, so the interrupt factors are also dependent on classes of products. The
interrupt vector table is the same as the one for software interrupt numbers 0 through 31 the INT instruction
uses. Peripheral I/O interrupts are maskable interrupts.
1)Bus collision detection interrupt
This is an interrupt that the serial I/O bus collision detection generates.
2)DMA0 interrupt, DMA1 interrupt
These are interrupts that DMA generates.
3)Key-input interrupt 0
___
A key-input interrupt occurs if an “L” is input to the KI pin.
4) Key-input interrupt 1
___
A key-input interrupt occurs if an “L” or “H” is input to the KI pin.
5)A-D conversion interrupt
This is an interrupt that the A-D converter generates.
6)UART0, UART1, UART2/NACK, SI/O3 and SI/O4 transmission interrupt
These are interrupts that the serial I/O transmission generates.
7)UART0, UART1, UART2/ACK, SI/O3 and SI/O4 reception interrupt
These are interrupts that the serial I/O reception generates.
8)Timer A0 interrupt through timer A4 interrupt
These are interrupts that timer A generates
9)Timer B0 interrupt through timer B5 interrupt
These are interrupts that timer B generates.
Rev.1.00 Jun 06, 2003 page 42 of 290