M16C6K9 Datasheet, PDF (268/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
CPU Reprogram Mode
Block Erase Command (2016/D016)
By issuing the command code “2016” in the 1^st bus cycle and the conformation command code “D016” and
block address in the 2^nd bus cycle, the erase operation specified by the block address starts (erase and
erase verification).
_____
Whether the block erase command is terminated can be conformed by reading the status register or the RY/BY
status flag. When the block erase operation starts, the read status register mode is accessed automatically
and the content of the status register can be read out. The status register bit 7 (SR7) is set to “0” at the same
time when the erase operation starts and is returned to “1” upon the completion of the erase operation. In this
case, the read status register mode remains active until the Read Array Command (FF16) is written.
_____
The RY/BY status flag is “0” during erase operation and “1” when the erase operation is completed the same
as the bit 7 of status register.
After the block erase, reading the status register can check the result. Refer to the section where the status
register is detailed.
Start
Write 2016
Write D016
Block address
Status register read
(The address for reading the status register
should be even and within the user ROM area.)
SR7=1? or ^NO
RY/BY=1?
YES
Full status check ^Error _{Erase error}
(Note 1)
Erase completed
Note 1: Refer to Fig. BB-5.
Fig.BB-4 Erase flowchart
Rev.1.00 Jun 06, 2003 page 268 of 290