M16C6K9 Datasheet, PDF (46/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
Interrupt
Table.DD-2 Interrupts assigned to the variable vector tables and addresses of vector
Software interrupt number ^{Vector table address}
Address (L) to address (H)
Interrupt source
Remarks
Software interrupt number 0
Software interrupt number 1
Software interrupt number 2
+0 to +3 (Note 1)
+4 to +7 (Note 1)
+8 to +11 (Note 1)
BRK instruction
I²C2
SCL2, SDA2/DMA0 (Note 2)
Cannot be masked by I flag
Software interrupt number 3
Software interrupt number 4
Software interrupt number 5
Software interrupt number 6
Software interrupt number 7
Software interrupt number 8
Software interrupt number 9
Software interrupt number 10
Software interrupt number 11
Software interrupt number 12
Software interrupt number 13
Software interrupt number 14
Software interrupt number 15
Software interrupt number 16
Software interrupt number 17
Software interrupt number 18
Software interrupt number 19
Software interrupt number 20
Software interrupt number 21
Software interrupt number 22
Software interrupt number 23
Software interrupt number 24
Software interrupt number 25
Software interrupt number 26
Software interrupt number 27
Software interrupt number 28
Software interrupt number 29
Software interrupt number 30
Software interrupt number 31
Software interrupt number 32
to
Software interrupt number 63
+12 to +15 (Note 1)
+16 to +19 (Note 1)
+20 to +23 (Note 1)
+24 to +27 (Note 1)
+28 to +31 (Note 1)
+32 to +35 (Note 1)
+36 to +39 (Note 1)
+40 to +43 (Note 1)
+44 to +47 (Note 1)
+48 to +51 (Note 1)
+52 to +55 (Note 1)
+56 to +59 (Note 1)
+60 to +63 (Note 1)
+64 to +67 (Note 1)
+68 to +71 (Note 1)
+72 to +75 (Note 1)
+76 to +79 (Note 1)
+80 to +83 (Note 1)
+84 to +87 (Note 1)
+88 to +91 (Note 1)
+92 to +95 (Note 1)
+96 to +99 (Note 1)
+100 to +103 (Note 1)
+104 to +107 (Note 1)
+108 to +111 (Note 1)
+112 to +115 (Note 1)
+116 to +119 (Note 1)
+120 to +123 (Note 1)
+124 to +127 (Note 1)
+128 to +131 (Note 1)
to
+252 to +255 (Note 1)
Timer B5/LRESET (Note 2)
INT3
INT9
Timer B4/UART1 reception/SIO4 (Note 3)
Timer B3/UART1 transmission (Note 3)
SIO4/INT6 (Note 3)
SIO3/INT5 (Note 3)
Bus collision detection/INT4 (Note 2)
INT8
DMA1/INT7 (Note 3)
Key input interrupt 0
A-D
UART2 transmit/IBF0 (Note 2)
UART2 receive/IBF1 (Note 2)
UART0 transmit/I²C0 (Note 2)
UART0 receive/SCL0,SDA0/INT11 (Note 3)
UART1 transmit/I²C1 (Note 3)
UART1 receive/SCL1,SDA1/INT10 (Note 3)
Timer A0
Timer A1/INT7/SIO3 (Note 3)
Timer A2
Timer A3/IBF2 (Note 2)
Timer A4/IBF3 (Note 2)
Timer B0/INT11/SCL0,SDA0 (Note 3)
Timer B1/INT10/SCL1,SDA1 (Note 3)
Timer B2/Key input interrupt 1 (Note 2)
INT0/PS20 (Note 2)
INT1/PS21 (Note 2)
INT2/PS22 (Note 2)
Software interrupt
Cannot be masked by I flag
Note 1: Address relative to address in interrupt table register (INTB).
Note 2: It is selected by interrupt request cause bit.
Note 3: Depend on interrupt event selection bit setting. Please do not set same interrupt
event at the same time.
Rev.1.00 Jun 06, 2003 page 46 of 290