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M16C6K9 Datasheet, PDF (82/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
M16C/6K9 Group
Timer A
Timer Ai register (Note)
(b15)
b7
(b8)
b0 b7
Symbol
b0
TA0
TA1
TA2
TA3
TA4
Address
038716,038616
038916,038816
038B16,038A16
038D16,038C16
038F16,038E16
When reset
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Function
Values that can be set R W
• Timer mode
Count the internal count source
• Event counter mode
Count pulses from external input or the overflow of timer
000016 to FFFF16
000016 to FFFF16
• One-shot timer mode
Count one shot width
000016 to FFFF16
• Pulse width modulation mode (16-bit PWM)
Function as a 16-bit pulse width modulator
• Pulse width modulation mode (8-bit PWM)
Timer low-order address functions as an 8-bit
prescaler and high-order address functions as an 8-bit
pulse width modulator
Note: Read and write data in 16-bit units.
000016 to FFFE16
0016 to FE16
(Both high-order
and low-order
addresses)
Count start flag
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
TABSR
Address
038016
When reset
0016
Bit symbol
TA0S
TA1S
TA2S
TA3S
TA4S
TB0S
TB1S
TB2S
Bit name
Timer A0 count start flag
Timer A1 count start flag
Timer A2 count start flag
Timer A3 count start flag
Timer A4 count start flag
Timer B0 count start flag
Timer B1 count start flag
Timer B2 count start flag
Function
0 : Stop count
1 : Start count
RW
Up/down flag
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
UDF
Address
038416
When reset
0016
Bit symbol
TA0UD
TA1UD
TA2UD
TA3UD
TA4UD
TA2P
TA3P
TA4P
Bit name
Function
Timer A0 up/down flag
Timer A1 up/down flag
Timer A2 up/down flag
Timer A3 up/down flag
Timer A4 up/down flag
0 : Down count
1 : Up count
This specification becomes valid
when the up/down flag content is
selected for up/down switching
factor
Timer A2 two-phase pulse
signal processing select bit
Timer A3 two-phase pulse
signal processing select bit
Timer A4 two-phase pulse
signal processing select bit
0 : two-phase pulse signal
processing disabled
1 : two-phase pulse signal
processing enabled
When not using the two-phase
pulse signal processing function,
set the select bit to “0”
RW
Fig.FB-5 Timer A-related registers (2)
Rev.1.00 Jun 06, 2003 page 82 of 290