M16C6K9 Datasheet, PDF (208/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
MULTI-MASTER I²C-BUS Interface
(2) Generation of RESTART condition
After 1 byte data transfer, a RESTART condition standby can be set up by writing “E016” to I²C
status register and the SDA pin will be released. Wait in software until SDA become “H” stable and then
owing to writing to I²C data shift register a START condition trigger will be generated. Fig.GC-25 shows
the restart condition generation timing.
(3) Limitation of internal clock 0
The registers of I²C-BUS interface circuit can not be read from or written to if the internal clock up selected
to sub clock (XCIN, XCOUT) by system clock selection bit (system clock control register 0, address 000616,
CMO7 bit). Please select main clock (XIN, XOUT) in read/write.
SCL
8 clock
ACK
clock
SDA
S1i writing signal
( Set the standby of start condition)
S0i writing signal
(START condition trigger generation)
Insert software wait
Fig.GC-25 The time of generation of RESTART condition
Rev.1.00 Jun 06, 2003 page 208 of 290