M16C6K9 Datasheet, PDF (189/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
MULTI-MASTER I²C-BUS Interface
•Bit 7: Communication mode specification bit (master/slave specification bit: MST)
This bit is used for master/slave specification for data communication. When this bit is “0”, the slave is
specified, so that a START condition and a STOP condition generated by the master are received. The data
communication is performed synchronized with the clock generated by the master. When this bit is “1”, the
master is specified and a START condition and a STOP condition are generated.
Additionally, the clocks required for data communication are generated on the SCL.
This bit is set to “0” by hardware in one of the following conditions.
•Immediately after the completion of 1-byte data transfer when arbitration lost is detected.
•When a STOP condition is detected.
•Writing a start condition is prevented by the start condition duplication preventing function (Note).
•At reset
Note: START condition duplication preventing function The MST, TRX, and BB bits is set to “1” at the same
time after confirming that the BB flag is “0” in the procedure of a START condition occurrence.
However, when a START condition by an other master device occurs and the BB flag is set to “1”
immediately after the contents of the BB flag is confirmed, the START condition duplication prevent-
ing function makes the writing to the MST and TRX bits invalid. The duplication preventing function
becomes valid from the rising of the BB flag to reception completion of slave address. Refer to the
method on the start condition generation in detail.
I²C status register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
S1i(i=0,1,2)
Address
032816,033816,031816
When reset
0001000X2
Bit symbol
Bit name
LRB
Last receive bit
AD0
General call detecting flag
AAS
Slave address comparison flag
AL
Arbitration lost detection flag
PIN
I²C-BUS interface interrupt
request bit
BB
Bus busy flag
TRX
MST
Communication mode
specification bits
Function
0 : Last bit = "0"
1 : Last bit = "1"
RW
(Note1)
0 : No general call detected
1 : General call detected
(Note1)
0 : Address disagreement
1 : Address agreement
(Note1)
0 : Not detected
1 : Detected
(Note1)
0 : Interrupt request issued
1 : No interrupt request issued
0 : Bus free
1 : Bus busy
(Note2)
(Note1)
b7 b6
0 0 : Slave receive mode
(Note3)
0 1 : Slave transmit mode
1 0 : Master receive mode
1 1 : Master transmit mode
(Note3)
Note1.This bit is read only if it is used for the status check.
How to write this bit, please refer to start condition/stop condition generating
method.
Note2.The bit can be read and only can be written with "0" by software.
Note3.Refer to the method of start condition generation on how to write these bits.
How to write this bit, please refer to start condition/stop condition generating
method.
Fig.GC-8 I²C status register
Rev.1.00 Jun 06, 2003 page 189 of 290