M16C6K9 Datasheet, PDF (216/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
PS2 Interface
qPS2i status register
• Transfer completion flag (TI)
The flag is set to “1” at the completion of transmission/reception and the completion of transfer abort.
The flag is cleared at read out from PS2i shift register or when the reception enable bit is changed from “0”
to “1”.
• Receiving flag (RF)
The flag is set to “1” during the data reception.
The flag is cleared automatically after the data reception or after the transfer abort.
• Reception abort incognizable flag (CD)
The flag is set in the case that device side can not recognize the abort even if the reception abort is requested.
(The flag is set in the period between the completion of data bit 6 reception and the completion of stop bit
reception.) The flag is cleared automatically after the completion of data reception or after the completion
of transfer abort.
✽ Note that during the period when the flag is set, the device side can not recognize the reception abort
request even if the tranfer abort is executed. Thus the data that the transfer abort is requested will not be
resent from device side.
• Transfer status flag (TS)
The flag is set to “1” at the completion of data reception.
The flag is cleared at read out from PS2i shift register or when the reception enable bit is changed from “0”
to “1”.
• Parity error flag (PE)
This bit is set to “1” when parity error occurs in received data.
The flag is cleared at read out from PS2i shift register or when the reception enable bit is changed from
“0” to “1”.
• Framing error / NACK reception flag (FE)
At the completion of reception: The flag is set when the detection of stop bit of reception data fails.
At the completion of transmission: The flag is set when NAK is received from the device side.
The flag is cleared at read out from PS2i shift register, the reception enable bit or the transmission bit is
changed from “0” to “1”.
• Transfer abort completion flag (CC)
This bit is set to “1” when transfer abort procession is completed.
The flag is cleared at read out from PS2i shift register, or when the reception enable bit or the transmission
bit is changed from “0” to “1”.
Rev.1.00 Jun 06, 2003 page 216 of 290