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M16C6K9 Datasheet, PDF (133/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
M16C/6K9 Group
A-D Converter
A-D control register 0 (Note 1)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
ADCON0
Address
03D616
When reset
00000XXX2
Bit symbol
CH0
CH1
CH2
MD0
MD1
Bit name
Analog input pin selection
bits
A-D operation mode
selection bits 0
Function
b2 b1 b0
0 0 0 : AN0 is selected
0 0 1 : AN1 is selected
0 1 0 : AN2 is selected
0 1 1 : AN3 is selected
1 0 0 : AN4 is selected
1 0 1 : AN5 is selected
1 1 0 : AN6 is selected
1 1 1 : AN7 is selected
b4 b3
0 0 : One-shot mode
0 1 : Repeat mode
1 0 : Single sweep mode
1 1 : Repeat sweep mode 0
Repeat sweep mode 1
RW
(Note 2)
(Note 2)
TRG
Trigger selection bit
0 : Software trigger
1 : ADTRG trigger
ADST
A-D conversion start flag 0 : A-D conversion disabled
1 : A-D conversion started
CKS0
Frequency selection bit 0 0 : FAD/4 selected
1 : FAD/2 selected
Note 1: If the A-D control register is rewritten during A-D conversion, the conversion result is
indeterminate.
Note 2: When changing A-D operation mode, set analog input pin again.
A-D control register 1 (Note)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
ADCON1
Address
03D716
When reset
0016
Bit symbol
Bit name
Function
SCAN0
A-D sweep pin selection bits When single sweep and repeat sweep
mode 0 are selected
b1 b0
0 0 : AN0, AN1 (2 pins)
0 1 : AN0 to AN3 (4 pins)
1 0 : AN0 to AN5 (6 pins)
1 1 : AN0 to AN7 (8 pins)
RW
SCAN1
MD2
A-D operation mode
selection bit 1
When repeat sweep mode 1 is selected
b1 b0
0 0 : AN0 (1 pin)
0 1 : AN0, AN1 (2 pins)
1 0 : AN0 to AN2 (3 pins)
1 1 : AN0 to AN3 (4 pins)
0 : Any mode other than repeat sweep
mode 1
1 : Repeat sweep mode 1
BITS
8/10-bit mode selection bit 0 : 8-bit mode
1 : 10-bit mode
CKS1
Frequency selection bit 1
0 : FAD/2 or FAD/4 selected
1 : FAD selected
VCUT Vref connect bit
OPA0
OPA1
ANEX0,1 selection bits
0 : Vref not connected
1 : Vref connected
b7 b6
0 0 : ANEX0 and ANEX1 are not used
0 1 : ANEX0 input is A-D converted
1 0 : ANEX1 input is A-D converted
1 1 : Inhibited
Note: If the A-D control register is rewritten during A-D conversion, the conversion result is
indeterminate.
Fig.JA-2 A-D converter-related registers (1)
Rev.1.00 Jun 06, 2003 page 133 of 290