M16C6K9 Datasheet, PDF (67/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
Interrupt
Clear the interrupt enable flag to “0”
(Disable interrupt)
Set the interrupt priority level to level 0
(Disable INTi interrupt)
Set the polarity select bit
Clear the interrupt request bit to “0”
Set the interrupt priority level to level 1 to 7
(Enable the accepting of INTi interrupt request)
Set the interrupt enable flag to “1”
(Enable interrupt)
______
Fig.DD-21 Switching condition of INT interrupt request
(5) Rewrite the interrupt control register
• To rewrite the interrupt control register, do so at a point that does not generate the interrupt request for that
register. If there is possibility of the interrupt request occurs, rewrite the interrupt control register after the
interrupt is disabled. The program examples are described as follow:
• When a instruction to rewrite the interrupt control register is executed when the interrupt is disabled, the
Example 1:
INT_SWITCH1:
FCLR I
AND.B #00h, 0055h
NOP
NOP
FSET I
; Disable interrupts.
; Clear TA0IC int. priority level and int. request bit.
; Four NOP instructions are required when using HOLD function.
; Enable interrupts.
Example 2:
INT_SWITCH2:
FCLR I
AND.B #00h, 0055h
MOV.W MEM, R0
FSET I
; Disable interrupts.
; Clear TA0IC int. priority level and int. request bit.
; Dummy read.
; Enable interrupts.
Example 3:
INT_SWITCH3:
PUSHC FLG
FCLR I
AND.B #00h, 0055h
POPC FLG
; Push Flag register onto stack
; Disable interrupts.
; Clear TA0IC int. priority level and int. request bit.
; Enable interrupts.
The reason why two NOP instructions (four when using the HOLD function) or dummy read are inserted
before FSET I in Examples 1 and 2 is to prevent the interrupt enable flag I from being set before the
interrupt control register is rewritten due to effects of the instruction queue.
interrupt request bit is not set sometimes even if the interrupt request for that register has been generated.
This will depend on the instruction. If this creates problems, use the below instructions to change the regis-
ter.
Instructions : AND, OR, BCLR, BSET
Rev.1.00 Jun 06, 2003 page 67 of 290