M16C6K9 Datasheet, PDF (25/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
SFR
030016
030116
030216
030316
030416
030516
030616
030716
030816
030916
030A16
030B16
030C16
030D16
030E16
030F16
031016
031116
031216
031316
031416
031516
031616
031716
031816
031916
031A16
031B16
031C16
031D16
031E16
031F16
032016
032116
032216
032316
032416
032516
032616
032716
032816
032916
032A16
032B16
032C16
032D16
032E16
032F16
033016
033116
033216
033316
033416
033516
033616
033716
033816
033916
033A16
033B16
033C16
033D16
033E16
033F16
PWM0 prescaler (PREPWM0)
PWM0 register (PWM0)
PWM1 prescaler (PREPWM1)
PWM1 register (PWM1)
PWM2 prescaler (PREPWM2)
PWM2 register (PWM2)
PWM3 prescaler (PREPWM3)
PWM3 register (PWM3)
PWM4 prescaler (PREPWM4)
PWM4 register (PWM4)
PWM5 prescaler (PREPWM5)
PWM5 register (PWM5)
PWM control register 0 (PWMCON0)
PWM control register 1 (PWMCON1)
I²C2 data shift register (S02) (Note2)
I²C2 address register (S0D2) (Note2)
I²C2 control register 0 (S1D2) (Note2)
I²C2 clock control register (S22) (Note2)
I²C2 start/stop condition control register (S2D2)
I²C2 control register 1 (S3D2) (Note2)
I²C2 control register 2 (S4D2) (Note2)
I²C2 status register (S12) (Note2)
(Note2)
I²C0 data shift register (S00)
I²C0 address register (S0D0)
I²C0 control register0 (S1D0)
I²C0 clock control register (S20)
I²C0 start/stop condition control register (S2D0)
I²C0 control register1 (S3D0)
I²C0 control register2 (S4D0)
I²C0 status register (S10)
I²C1 data shift register (S01)
I²C1 address register (S0D1)
I²C1 control register0 (S1D1)
I²C1 clock control register (S21)
I²C1 start/stop condition control register (S2D1)
I²C1 control register1 (S3D1)
I²C1 control register2 (S4D1)
I²C1 status register (S11)
034016
034116
034216
034316
034416
034516
034616
034716
034816
034916
034A16
034B16
034C16
034D16
034E16
034F16
035016
035116
035216
035316
035416
035516
035616
035716
035816
035916
035A16
035B16
035C16
035D16
035E16
035F16
036016
036116
036216
036316
036416
036516
036616
036716
036816
036916
036A16
036B16
036C16
036D16
036E16
036F16
037016
037116
037216
037316
037416
037516
037616
037716
037816
037916
037A16
037B16
037C16
037D16
037E16
037F16
TimerB3,4,5 count start flag (TBSR)
TimerB3 register (TB3)
TimerB4 register (TB4)
TimerB5 register (TB5)
Interrupt event select register1 (IFSR1)
Interrupt event select register2 (IFSR2)
Interrupt event select register3 (IFSR3)
Interrupt event select register4 (IFSR4)
Interrupt event select register5 (IFSR5)
TimerB3 mode register (TB3MR)
TimerB4 mode register (TB4MR)
TimerB5 mode register (TB5MR)
Interrupt event select register0 (IFSR0)
SI/O3 transmit/receive register (S3TRR)
SI/O3 control register (S3C)
SI/O3 communication speed register (S3BRG)
SI/O4 transmit/receive register (S4TRR)
SI/O4 control register (S4C)
SI/O4 communication speed register (S4BRG)
UART2 special mode register (U2SMR)
UART2 transmit/receive mode register (U2MR)
UART2 communication speed register (U2BRG)
UART2 tranmit buffer register (U2TB)
UART2 transmit/receive control register0 (U2C0)
UART2 transmit/receive control register1 (U2C1)
UART2 receive buffer register (U2RB)
Note 1: The areas that nothing are allocated in SFR are reserved. Read and Write to the areas are inhibited.
Note 2: Nothing is allocated in M306K9F8LRP.
Fig.CA-4 Location of peripheral unit control registers (3)
Rev.1.00 Jun 06, 2003 page 25 of 290