M16C6K9 Datasheet, PDF (110/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
Serial I/O
Clock synchronous serial I/O mode
• Example of transmit timing (when internal clock is selected)
Tc
Transfer clock
“1”
Transmit enable
bit (TE)
“0”
Transmit buffer ^{“1”}
empty flag (Tl) _{“0”}
“H”
CTSi
“L”
CLKi
Data is set in UARTi transmit buffer register
Transferred from UARTi transmit buffer register to UARTi transmit register
TCLK
Stopped because CTS = “H”
Stopped because transfer enable bit = “0”
TxDi
Transmit
“1”
register empty
“0”
flag (TXEPT)
Transmit interrupt ^{“1”}
request bit (IR) “0”
D0 D1 D2 D3 D4 D5 D6 D7
D0 D1 D2 D3 D4 D5 D6 D7
D0 D1 D2 D3 D4 D5 D6 D7
Shown in ( ) are bit symbols.
Cleared to “0” when interrupt request is accepted, or cleared by software
The above timing applies to the following settings:
• Internal clock is selected.
• CTS function is selected.
• CLK polarity selection bit = “0”.
• Transmit interrupt factor selection bit = “0”.
Tc = TCLK = 2(n + 1) / fi
fi: frequency of BRGi count source (f1, f8, f32)
n: value set to BRGi
• Example of receive timing (when external clock is selected)
“1”
Receive enable
bit (RE)
“0”
“1”
Transmit enable
bit (TE)
“0”
Transmit buffer ^{“1”}
empty flag (Tl) “0”
“H”
RTSi
“L”
CLKi
Dummy data is set in UARTi transmit buffer register
Transferred from UARTi transmit buffer register to UARTi transmit register
1 / fEXT
Receive data is taken in
RxDi
D0 D1 D2 D3 D4 D5 D6 D7
D0 D1 D2 D3 D4 D5
Receive complete ^{“1”}
flag (Rl)
“0”
Transferred from UARTi receive register
to UARTi receive buffer register
Read out from UARTi receive buffer register
Receive interrupt ^{“1”}
request bit (IR) “0”
Cleared to “0” when interrupt request is accepted, or cleared by software
Shown in ( ) are bit symbols.
The above timing applies to the following settings:
• External clock is selected.
• RTS function is selected.
• CLK polarity selection bit = “0”.
fEXT: frequency of external clock
The following conditions should be matched when the input level of
CLKi pin is "H" before the data reception.
• Transmit enable bit “1”
• Receive enable bit “1”
• Dummy data write to UARTi transmit buffer register
Fig.GA-10 Typical transmit/receive timings in clock synchronous serial I/O mode
Rev.1.00 Jun 06, 2003 page 110 of 290