M16C6K9 Datasheet, PDF (271/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
Functions To Inhibit Rewriting Flash Memory
Functions to inhibit rewriting to the on-chip flash memory
To prevent flash memory from being miss-read or miss-written, ROM code protect function for parallel I/O
mode and ID code check function for standard serial mode are introduced.
ROM code protect function
ROM code protect function can inhibit readout from or modification to the flash memory by setting the content
in ROM code protect control address (0FFFFF16) for parallel I/O mode. Fig.BB-6 shows the content of ROM
code protect control address (0FFFFF16). (The address exists in user ROM area.)
If one of the pair of ROM code protect bits is set to “0”, ROM code protect is turned on, so that the flash
memory is protected against the readout or modification. ROM code protect is implemented in two levels. If
level 2 is selected, the flash memory is protected even against readout by a shipment inspection LSI tester,
etc. When both level 1 and level 2 are set, level 2 will be selected.
If both of the two ROM code protect reset bits are set to “00”, ROM code protect is turned off, so that the flash
memory can be read out or modified. Once ROM code protect is turned on, the ROM code protect reset bits
cannot be modified in parallel I/O mode. Use the serial mode or other to rewrite these two bits.
ROM code protect control address
b7 b6 b5 b4 b3 b2 b1 b0
11
Symbol
ROMCP
Address
0FFFFF16
When reset
FF16
Bit symbol
Reserved bits
Bit name
Function
Always set these bits to “1”
ROMCP2
ROM code protect level
2 set bits (Note 1,2)
b3 b2
0 0: Protect enabled
0 1: Protect enabled
1 0: Protect enabled
1 1: Protect disabled
ROMCR
b5 b4
ROM code protect reset
0 0: Protect removed
0 1: Protect set bits effective
bits (Note 3)
1 0: Protect set bits effective
1 1: Protect set bits effective
ROMCP1
ROM code protect level
1 set bits (Note 1)
b7 b6
0 0: Protect enabled
0 1: Protect enabled
1 0: Protect enabled
1 1: Protect disabled
Note 1: When ROM code protect is turned on, the on-chip flash memory is
protected against readout or modification in parallel I/O mode.
Note 2: When ROM code protect level 2 is turned on, ROM code readout by
a shipment inspection LSI tester,etc. is also inhibited.
Note 3: The ROM code protect reset bits can be used to turn off ROM code
protect level 1 and level 2. However,Since these bits can not be
modified in parallel I/O mode, they should be rewritten in serial I/O
mode or other modes.
Fig.BB-6 ROM code protect control address
Rev.1.00 Jun 06, 2003 page 271 of 290