M16C6K9 Datasheet, PDF (186/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
MULTI-MASTER I²C-BUS Interface
The signal of writing "1" to IHR bit
IHR bit
The reset signal to I²C-BUS interface circuit
2.5 VIIC cycles
Fig.GC-6 The timing of reset to the I²C-BUS interface circuit
I²C control register 0
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
S1Di(i=0,1,2)
Address
032316,033316,031316
When reset
000000002
Bit Symbol
Bit name
BC0
Bit counter
(Number of transmitting/
receiving bits)
BC1
BC2
Function
b2 b1 b0
0 0 0:8
0 0 1:7
0 1 0:6
0 1 1:5
1 0 0:4
1 0 1:3
1 1 0:2
1 1 1:1
(Note)
RW
ES0
I ²C-BUS interface
enable bit
0 : Disable
1 : Enable
ALS
Data format selection bit
0 : Addressing format
1 : Free data format
DBIT
SAD
Addressing format
selection bit
0 : 7-bit addressing format
1 : 10-bit addressing format
IHR
I²C-BUS interface reset bit 0 : Release of reset (auto)
1 : Reset
TISS
I²C-BUS interface pin
input level selection bit
0 : I²C-BUS input
1 : SMBUS input
Note
In the following status, the bit counter will be cleared automatically
•Start condition/stop condition is detected
•Right after the completion of 1 byte data transmission
•Right after the completion of 1 byte data receiving
Fig.GC-7 I²C control register
Rev.1.00 Jun 06, 2003 page 186 of 290