M16C6K9 Datasheet, PDF (203/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
MULTI-MASTER I²C-BUS Interface
Address Data Communication
There are two address data communication formats, namely, 7-bit addressing format and 10-bit addressing
format. The respective address communication formats are described below.
(1) 7-bit addressing format
To adapt the 7-bit addressing format, set the DBIT SAD bit of the I²C control register 0 (address 032316,
033316, 031316) to “0”. The first 7-bit address data transmitted from the master is compared with the high-
order 7-bit slave address stored in the I²C address register (address 032216, 033216, 031216). At the time of
this comparison, address comparison of the RBW bit of the I²C address register (address 032216, 033216,
031216) is not performed. For the data transmission format when the 7-bit addressing format is selected,
refer to Fig.GC-21 (1) and (2).
(2) 10-bit addressing format
To adapt the 10-bit addressing format, set the DBIT SAD bit of the I²C control register 0 (address 032316,
033316, 031316) to “1”. Also set the WIT bit of I²C control register 1 to “1”. An address comparison is per-
formed between the first-byte address data transmitted from the master and the 8-bit slave address stored in
the I²C address register (address 032216, 033216, 031216). At the time of this comparison, an address
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comparison between the RBW bit of the I²C address register (address 032016, 033016, 031016) and the R/W
bit which is the last bit of the address data transmitted from the master is made. In the 10-bit addressing
mode, the RBW bit which is the last bit of the address data not only specifies the direction of communication
for control data, but also is processed as an address data bit.
When the first-byte address data agree with the slave address, the AAS bit of the I²C status register (address
032816, 033816, 031816) is set to “1”. After the second-byte address data is stored into the I²C data shift
register (address 32016, 33016, 031016), perform an address comparison between the second-byte data and
the slave address by software. When the address data of the 2 bytes agree with the slave address, write “0”
to the ACKBIT to I²C clock control register, to return an ACK. When the address data of the 2 bytes do not
agree with the slave address, it does not return an ACK so that makes the finish of the communication by
writing “1” to the ACKBIT. If the address data agree with each other, set the RBW bit of the I²C address
register (address 032216, 033216, 031216) to “1” by software. This processing can make the 7-bit slave
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address and R/W data agree, which are received after a RESTART condition is detected, with the value of
the I²C address register (address 032216, 033216, 031216). For the data transmission format when the 10-bit
addressing format is selected, refer to Fig.GC-21(3) and (4).
Rev.1.00 Jun 06, 2003 page 203 of 290