M16C6K9 Datasheet, PDF (287/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
Standard Serial I/O Mode
Status register 1 (SRD1)
Status register 1 indicates the status of serial communication, the result of ID codes comparison, the result of
checksum comparison etc. It can be read after SDR by issuing the read status register command (7016). The
register can be cleared by issuing the clear status register command (5016).
Table EE-4 shows the definition of each bit of the register.
After power on, status register 1 outputs “0016”.
Table EE-4 Status register (SRD1)
Each bit of
SRD
Status name
SR15 (bit7) Boot update completed bit
SR14 (bit6) Reserved
SR13 (bit5) Reserved
SR12 (bit4) Check sum match bit
SR11 (bit3) ID check completed bits
SR10 (bit2)
SR9 (bit1)
SR8 (bit0)
Timeout of data reception
Reserved
Definition
"1"
Update completed
-
"0"
Not update
-
-
-
Match
Mismatch
00 Not verified
01 Verified with mismatch
10 Reserved
11 Verified with match
Timeout
-
Normal operation
-
Boot update completed bit (SR15)
The flag indicates that if the control program has been downloaded to RAM with download function.
Check sum match bit (SR12)
The flag indicates if the check sum is matched when downloading the control program with download function.
ID check completed bits (SR11, SR10)
These bits indicate the result of ID checks. Some commands cannot be accepted without the ID checks.
Timeout of data reception bit (SR9)
The flag indicates if timeout occurs during data reception. If the bit is set to “1” during data reception,
microcomputer will discard the received data and return to wait state.
Rev.1.00 Jun 06, 2003 page 287 of 290