M16C6K9 Datasheet, PDF (266/292 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6K9 Group
CPU Reprogram Mode
Software commands
Table BB-1 lists the S/W commands available.
After setting the CPU reprogram mode select bit to “1”, the S/W commands can be used to specify the
erasing or programming operation. Note that when entering a S/W command, the upper byte (D15–D8) is
ignored.
The content of each S/W command is explained below.
Table BB-1 List of software commands (CPU reprogram mode)
Command
Cycle
number
The 1^st bus cycle
Mode
Address
Data
(D15–D0)
Read array
1
Write X (Note 5)
FF16
Read status register
2
Write
X
7016
Clear status register
1
Write
X
5016
Program
2
Write
X
4016
Block erase
2
Write
X
2016
The 2^nd bus cycle
Mode
Address
Data
(D15–D0)
Read
X
SRD(Note 2)
Write
Write
WA(Note 3) WD(Note 3)
BA(Note 4)
D016
Note 1: When a S/W command is input, the high-order byte of the data(D15–D8) is ignored.
Note 2: SRD = Status Register Data. The address should be even and within the user ROM area.
Note 3: WA = Write Address, WD = Write Data
Note 4: BA = Block Address (the maximum even address of the block)
Note 5: “X” can be any even address in user ROM area.
Read Array Command (FF16)
Issuing the command code “FF16” in the 1^st bus cycle enters the read array mode. When an even address is
issued in one of the bus cycle that follows, the content of the address is read out at the data bus (D15–D0), 16
bits at a time.
The read array mode is retained intact until another command is written.
Read Status Register Command (7016)
When the command code “7016” is issued in the 1^st bus cycle, the content of the status register is read out at
the data bus (D7–D0) by a read in the 2^nd bus cycle.
The status register is explained in the next section.
Clear Status Register Command (5016)
The command is used to clear the bits SR4 and SR5 of the status register after they have been set. These
bits indicate that operation has ended in error. To use this command, issue the command code “5016” in the
1^st bus cycle.
Rev.1.00 Jun 06, 2003 page 266 of 290