MC68HC08AZ16 Datasheet, PDF (83/527 Pages) Motorola, Inc – HCMOS Microcontroller Unit

System Integration Module (SIM)
SIM counter
The SIM counter is used by the power-on reset module (POR) and in
STOP mode recovery to allow the oscillator time to stabilize before
enabling the internal bus (IBUS) clocks. The SIM counter also serves as
a prescaler for the computer operating properly (COP) module. The SIM
counter overflow supplies the clock for the COP module. The SIM
counter is 13 bits long and is clocked by the falling edge of CGMXCLK.
SIM counter during
power-on reset
The power-on reset (POR) module detects power applied to the MCU.
At power-on, the POR circuit asserts the signal PORRST. Once the SIM
is initialized, it enables the clock generation module (CGM) to drive the
bus clock state machine.
SIM counter during
STOP mode
recovery
The SIM counter is also used for STOP mode recovery. The STOP
instruction clears the SIM counter. After an interrupt, break, or reset, the
SIM senses the state of the short STOP recovery bit, SSREC, in the
mask option register. If the SSREC bit is a logic ’1’, then the STOP
recovery is reduced from the normal delay of 4096 CGMXCLK cycles
down to 32 CGMXCLK cycles. This is ideal for applications using canned
oscillators that do not require long start-up times from STOP mode.
External crystal applications should use the full STOP recovery time,
that is, with SSREC cleared.
SIM counter and
reset states
External reset has no effect on the SIM counter. (See STOP mode on
page 89. for details). The SIM counter is free-running after all reset
states, see Active resets from internal sources on page 78 for counter
control and internal reset recovery sequences.
MC68HC08AZ32
82
System Integration Module (SIM)
12-sim
MOTOROLA