MC68HC08AZ16 Datasheet, PDF (474/527 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Appendix B: TIMA-6
I/O Signals
I/O Signals
Port D shares one of its pins with the TIMA. Port E shares two of its pins
with the TIMA and port F shares four of its pins with the TIMA.
PTD6/TACLK is an external clock input to the TIMA prescaler. The six
TIMA channel I/O pins are PTE2/TACH0, PTE3/TACH1, PTF0/TACH2,
PTF1/TACH3, PTF2, and PTF3.
TIMA Clock Pin
(PTD6/ATD14/
TCLK)
PTD6/TACLK is an external clock input that can be the clock source for
the TIMA counter instead of the prescaled internal bus clock. Select the
PTD6/TACLK input by writing logic 1s to the three prescaler select bits,
PS[2:0]. (See TIMA Status and Control Register.) The minimum TCLK
pulse width, TCLK_LMIN or TCLK_HMIN, is:
b----u---s-----f-r--e---1-q---u---e----n---c---y-- ^{+ tSU}
The maximum TCLK frequency is the least: 4 MHz or bus frequency ÷ 2.
PTD6/TACLK is available as a general-purpose I/O pin or ADC channel
when not used as the TIMA clock input. When the PTD6/TACLK pin is
the TIMA clock input, it is an input regardless of the state of the DDRD6
bit in data direction register D.
TIMA Channel I/O
Pins
(PTF3ÐPTF0/TACH2
and
PTE3/TACH1ÐPTE2/
TACH0)
Each channel I/O pin is programmable independently as an input
capture pin or an output compare pin. PTE2/TACH0, PTE6/TACH2, and
PTF2 can be configured as buffered output compare or buffered PWM
pins.
17-tima6
MOTOROLA
Appendix B: TIMA-6
MC68HC08AZ32
473