MC68HC08AZ16 Datasheet, PDF (238/527 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Serial Peripheral Interface Module (SPI)
I/O registers
I/O registers
Three registers control and monitor SPI operation:
• SPI control register (SPCR)
• SPI status and control register (SPSCR)
• SPI data register (SPDR)
SPI control register
(SPCR)
The SPI control register does the following:
• Enables SPI module interrupt requests
• Selects CPU interrupt requests
• Configures the SPI module as master or slave
• Selects serial clock polarity and phase
• Configures the SPSCK, MOSI, and MISO pins as open-drain
outputs
• Enables the SPI module
Bit 7
6
5
4
3
2
1
SPCR
Read:
SPRIE
R
SPMSTR CPOL CPHA SPWOM SPE
Write:
Reset: 0
0
1
0
1
0
0
R
= Reserved
Figure 13. SPI control register (SPCR)
Bit 0
SPTIE
0
SPRIE — SPI receiver interrupt enable
This read/write bit enables CPU interrupt requests generated by the
SPRF bit. The SPRF bit is set when a byte transfers from the shift
register to the receive data register. Reset clears the SPRIE bit.
1 = SPRF CPU interrupt requests enabled
0 = SPRF CPU interrupt requests disabled
29-spi
MOTOROLA
Serial Peripheral Interface Module (SPI)
MC68HC08AZ32
237