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MC68HC08AZ16 Datasheet, PDF (31/527 Pages) Motorola, Inc – HCMOS Microcontroller Unit
Memory Map
Addr.
Name
Bit 7
$0015
SCI Control Register 3 R: R8
(SCC3) W:
$0016
SCI Status Register 1 R: SCTE
(SCS1) W:
$0017
SCI Status Register 2 R: 0
(SCS2) W:
$0018
SCI Data Register R:
(SCDR) W:
Bit 7
$0019
SCI Baud Rate Register R:
(SCBR) W:
0
$001A
IRQ Status and Control R:
Register (ISCR) W:
$001B
Keyboard Status/Control R:
(KBSCR) W:
0
$001C
PLL Control Register R:
(PCTL) W:
PLLIE
$001D
PLL Bandwidth Control R:
Register (PBWC) W:
AUTO
$001E
PLL Programming R:
Register (PPG) W:
MUL7
$001F
MaskOptionRegisterA R:
(MORA) W:
$0020
TimerAStatusandControl R: TOF
Register(TASC) W: 0
$0021
KeyboardInterruptEnable R;
Register(KBIER) W:
$0022
TimerACounterRegisterHigh R:
(TACNTH) W;
Bit 15
£0023
TimerACounterRegisterLow R:
(TACNTL) W:
Bit 7
$0024
TimerA Modulo Register R:
High (TAMODH) W:
Bit 15
$0025
TimerA Modulo Register R:
Low (TAMODL) W:
Bit 7
Timer A Channel 0 Status R: CH0F
$0026
and Control Register
(TASC0)
W:
0
$0027
TimerA Channel 0 R:
Register High (TACH0H) W:
Bit 15
$0028
Timer A Channel 0 R:
Register Low (TACH0L) W:
Bit 7
6
5
4
3
T8 DMARE DMATE ORIE
TC SCRF IDLE OR
2
NEIE
NF
1
FEIE
FE
Bit 0
PEIE
PE
0
0
0
0
0
BKF RPF
6
5
0
SCP1
0
0
PLLF PLLON
LOCK ACQ
4
SCP0
0
BCS
XLD
3
0
IRQ1F
KEYF
1
2
1
Bit 0
SCR2 SCR1 SCR0
0
ACK1
0
ACKK
1
IMASK1 MODE1
IMASKK MODEK
1
1
0
0
0
0
MUL6 MUL5 MUL4 VRS7 VRS6 VRS5 VRS4
SEC LVIRSTD LVIPWRD SSREC COPRS STOP COPD
TOIE TSTOP
14
13
0
TRST
KBIE4
12
0
PS2 PS1 PS0
KBIE3
11
KBIE2
10
KBIE1
9
KBIE0
Bit 8
6
5
4
3
2
1
Bit 0
14
13
6
5
12
11
10
9
Bit 8
4
3
2
1
Bit 0
CH0IE MS0B MS0A ELS0B ELS0A TOV0 CH0MAX
14
13
6
5
12
11
10
9
Bit 8
4
3
2
1
Bit 0
= Unimplemented
R = Reserved
Figure 2. Control, status, and data registers (Sheet 2 of 5)
MC68HC08AZ32
30
Memory Map
6-mem
MOTOROLA