MC68HC08AZ16 Datasheet, PDF (34/527 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Memory Map
I/O section
Addr.
Name
Bit 7
6
5
4
3
2
1
Bit 0
$FE00
SIM Break Status Register
(SBSR)
R:
W:
R
R
$FE01
SIM Reset Status Register
(SRSR)
R:
W:
POR
PIN
R
COP
R
ILOP
R
ILAD
R SBSW R
0
LVI
0
$FE03
SIM Break Flag Control R:
Register (SBFCR) W:
BCFE
R
R
R
R
R
R
R
$FE07
Reserved
R:
W:
$FE0C
Break Address Register R:
High (BRKH) W:
Bit 15
14
13
$FE0D
Break Address Register R:
Low (BRKL) W:
Bit 7
6
5
$FE0E
Break Status and Control R:
Register (BRKSCR) W:
BRKE
BRKA
0
$FE0F
LVI Status Register R: LVIOUT
(LVISR) W:
0
0
12
11
10
9
Bit 8
4
3
2
1
Bit 0
0
0
0
0
0
0
0
0
0
0
$FE1C
$FE1D
$FE1E
$FE1F
EENVR
EECR
Reserved
EEACR
R:
W:
EERA
CON2
R:
W:
EEBCLK
0
R:
W:
R
R
R: EERA CON2
W:
CON1
EEOFF
R
CON1
CON0 EEPB3 EEPB2
EERAS1 EERAS0 ELAT
R
R
R
CON0 EEBP3 EEBP2
EEPB1 EEPB0
0 _EEPGM
R
R
EEBP1 EEBP0
$FFFF
COP Control Register R:
(COPCTL) W:
LOW BYTE OF RESET VECTOR
WRITING TO $FFFF CLEARS COP COUNTER
= Unimplemented
R = Reserved
Figure 2. Control, status, and data registers (Sheet 5 of 5)
9-mem
MOTOROLA
Memory Map
MC68HC08AZ32
33