MC68HC08AZ16 Datasheet, PDF (492/527 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Appendix C: ADC-15
Interrupts
Refer to ADC Characteristics on page 398.
Conversion Time = ¹ï£§⁶^to¹⁷^A^D^C ^Cl^oc^{k C}^y^cle^s
ADC Clock Frequency
Number of Bus Cycles = Conversion Time x Bus Frequency
Continuous
Conversion
Accuracy and
Precision
In the continuous conversion mode, the ADC data register will be filled
with new data after each conversion. Data from the previous conversion
will be overwritten whether that data has been read or not. Conversions
will continue until the ADCO bit (ADC status control register, $0038) is
cleared. The COCO bit is set after the first conversion and will stay set
for the next several conversions until the next write of the ADC status
and control register or the next read of the ADC data register.
The conversion process is monotonic and has no missing codes. See
ADC Characteristics on page 398 for accuracy information.
Interrupts
When the AIEN bit is set, the ADC module is capable of generating a
CPU interrupt after each ADC conversion. A CPU interrupt is generated
if the COCO bit (ADC status control register, $0038) is at logic 0. If the
COCO bit is set, an interrupt is generated. The COCO bit is not used as
a conversion complete flag when interrupts are enabled.
5-adc15
MOTOROLA
Appendix C: ADC-15
MC68HC08AZ32
491