MC68HC08AZ16 Datasheet, PDF (256/527 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Timer Interface Module A (TIMA)
Functional description
NOTE:
In buffered PWM signal generation, do not write new pulse width values
to the currently active channel registers. Writing to the active channel
registers is the same as generating unbuffered PWM signals.
PWM initialization
To ensure correct operation when generating unbuffered or buffered
PWM signals, use the following initialization procedure:
NOTE:
1. In the TIMA status and control register (TASC):
a. Stop the TIMA counter by setting the TIMA stop bit,
TSTOP.
b. Reset the TIMA counter by setting the TIMA reset bit,
TRST.
2. In the TIMA counter modulo registers
(TAMODH:TAMODL), write the value for the required PWM
period.
3. In the TIMA channel x registers (TACHxH:TACHxL), write
the value for the required pulse width.
4. In TIMA channel x status and control register (TASCx):
a. Write 0:1 (for unbuffered output compare or PWM
signals) or 1:0 (for buffered output compare or PWM
signals) to the mode select bits, MSxB:MSxA. See
Table 3.
b. Write 1 to the toggle-on-overflow bit, TOVx.
c. Write 1:0 (to clear output on compare) or 1:1 (to set
output on compare) to the edge/level select bits,
ELSxB:ELSxA. The output action on compare must
force the output to the complement of the pulse width
level. See Table 3.
In PWM signal generation, do not program the PWM channel to toggle
on output compare. Toggling on output compare prevents reliable 0%
duty cycle generation and removes the ability of the channel to
self-correct in the event of software error or noise. Toggling on output
compare can also cause incorrect PWM signal generation when
changing the PWM pulse width to a new, much larger value.
11-tima
MOTOROLA
Timer Interface Module A (TIMA)
MC68HC08AZ32
255