MC68HC08AZ16 Datasheet, PDF (32/527 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Memory Map
I/O section
Addr.
Name
Bit 7
Timer A Channel 1 Status R: CH1F
$0029
and Control Register
(TASC1)
W:
0
$002A
Timer A Channel 1 R:
Register High (TACH1H) W:
Bit 15
$002B
Timer A Channel 1 R:
Register Low (TACH1L) W:
Bit 7
Timer A Channel 2 Status R: CH2F
$002C
and Control Register
(TASC2)
W:
0
$002D
Timer A Channel 2 R:
Register High (TACH2H) W:
Bit 15
$002E
Timer A Channel 2 R:
Register Low (TACH2L) W:
Bit 7
Timer Channel 3 Status R: CH3F
$002F
and Control Register
(TASC3)
W:
0
$0030
Timer Channel 3 Register R:
High (TACH3H) W:
Bit 15
$0031
Timer Channel 3 Register R:
Low (TACH3L) W:
Bit 7
$0032
Unimplemented
R:
W:
$0033
Unimplemented
R:
W:
$0034
Unimplemented
R:
W:
$0035
Unimplemented
R:
W:
$0036
Unimplemented
R:
W:
$0037
Unimplemented
R:
W:
$0038
ADSCR
R:
W:
COCO
$0039
ADR
R: AD7
W:
$003A
ADC Input Clock Select R:
(ADCLKR) W:
ADIV2
$003B
EBI Control
Register(EBIC)
R:
W:
0
6
CH1IE
14
6
CH2IE
14
6
CH3IE
14
6
AIEN
AD6
ADIV1
IRV
5
0
13
5
MS2B
13
5
MS3B
13
5
ADCO
AD5
ADIV0
NODE
4
3
2
1
Bit 0
MS1A ELS1B ELS1A TOV1 CH1MAX
12
11
10
9
Bit 8
4
3
2
1
Bit 0
MS2A ELS2B ELS2A TOV2 CH2MAX
12
11
10
9
Bit 8
4
3
2
1
Bit 0
MS3A ELS3B ELS3A TOV3 CH3MAX
12
11
10
9
Bit 8
4
3
2
1
Bit 0
CH4 CH3 CH2 CH1 CH0
AD4 AD3 AD2 AD1 AD0
ADICLK
0
0
0
0
CS0WS MODE WSCLK0 CSC1 CSC0
= Unimplemented
R = Reserved
Figure 2. Control, status, and data registers (Sheet 3 of 5)
7-mem
MOTOROLA
Memory Map
MC68HC08AZ32
31