MC68HC08AZ16 Datasheet, PDF (163/527 Pages) Motorola, Inc – HCMOS Microcontroller Unit

External Interrupt Module (IRQ)
Functional description
A ’0’ applied to any of the external interrupt pins can latch a CPU
interrupt request. Figure 3 shows the structure of the IRQ module.
Interrupt signals on the IRQ1 pin are latched into the IRQ1 latch. An
interrupt latch remains set until one of the following occurs:
• Vector fetch — a vector fetch automatically generates an interrupt
acknowledge signal which clears the latch that caused the vector
fetch.
• Software clear — software can clear an interrupt latch by writing
to the appropriate acknowledge bit in the interrupt status and
control register (ISCR). Writing a ’1’ to the ACK1 bit clears the
IRQ1 latch.
• Reset — a reset automatically clears the interrupt latch.
ACK1
VECTOR
FETCH
DECODER
TO CPU FOR
BIL/BIH
INSTRUCTIONS
IRQ1
V_DD
D ^CLR Q
CK
IRQ1
LATCH
SYNCHRO-
NIZER
IMASK1
IRQ1F
IRQ1
INTERRUPT
REQUEST
MODE1
HIGH
VOLTAGE
DETECT
TO MODE
SELECT
LOGIC
MC68HC08AZ32
162
External Interrupt Module (IRQ)
2-irq
MOTOROLA