MC68HC08AZ16 Datasheet, PDF (223/527 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Serial Peripheral Interface Module (SPI)
Error conditions
The following flags signal SPI error conditions:
• Overflow (OVRF) — failing to read the SPI data register before the
next byte enters the shift register results in the OVRF bit becoming
set. The new byte does not transfer to the receive data register,
and the unread byte still can be read by accessing the SPI data
register. OVRF is in the SPI status and control register.
• Mode fault error (MODF) — the MODF bit indicates that the
voltage on the slave select pin (SS) is inconsistent with the mode
of the SPI. MODF is in the SPI status and control register.
Overflow error
The overflow flag (OVRF) becomes set if the SPI receive data register
still has unread data from a previous transmission when the capture
strobe of bit 1 of the next transmission occurs. See Figure 4 and Figure
6. If an overflow occurs, the data being received is not transferred to the
receive data register so that the unread data can still be read. Therefore,
an overflow error always indicates the loss of data.
OVRF generates a receiver/error CPU interrupt request if the error
interrupt enable bit (ERRIE) is also set. MODF and OVRF can generate
a receiver/error CPU interrupt request. See Figure 10. It is not possible
to enable only MODF or OVRF to generate a receiver/error CPU
interrupt request. However, leaving MODFEN low prevents MODF from
being set.
If an end-of-block transmission interrupt was meant to pull the MCU out
of wait, having an overflow condition without overflow interrupts enabled
causes the MCU to hang in wait mode. If the OVRF is enabled to
generate an interrupt, it can pull the MCU out of wait mode instead.
If the CPU SPRF interrupt is enabled and the OVRF interrupt is not,
watch for an overflow condition. Figure 8 shows how it is possible to
miss an overflow.
MC68HC08AZ32
222
Serial Peripheral Interface Module (SPI)
14-spi
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