MC68HC08AZ16 Datasheet, PDF (496/527 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Appendix C: ADC-15
I/O Registers
AIEN — ADC Interrupt Enable Bit
When this bit is set, an interrupt is generated at the end of an ADC
conversion. The interrupt signal is cleared when the data register is
read or the status/control register is written. Reset clears the AIEN bit.
1 = ADC interrupt enabled
0 = ADC interrupt disabled
ADCO — ADC Continuous Conversion Bit
When set, the ADC will convert samples continuously and update the
ADR register at the end of each conversion. Only one conversion is
allowed when this bit is cleared. Reset clears the ADCO bit.
1 = Continuous ADC conversion
0 = One ADC conversion
ADCH[4:0] — ADC Channel Select Bits
ADCH4, ADCH3, ADCH2, ADCH1, and ADCH0 form a 5-bit field
which is used to select one of 15 ADC channels. The six channels are
detailed in the following table. Care should be taken when using a port
pin as both an analog and a digital input simultaneously to prevent
switching noise from corrupting the analog signal. See Table 1.
The ADC subsystem is turned off when the channel select bits are all
set to one. This feature allows for reduced power consumption for the
MCU when the ADC is not used. Reset sets these bits.
NOTE: Recovery from the disabled state requires one conversion cycle to
stabilize.
9-adc15
MOTOROLA
Appendix C: ADC-15
MC68HC08AZ32
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