MC68HC08AZ16 Datasheet, PDF (478/527 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Appendix B: TIMA-6
I/O Registers
Bit 7
6
5
4
3
2
1
Bit 0
TACNTH ^{Read: BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8}
$0022 _{Write: R}
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
TACNTL ^{Read: BIT 7}
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
$0023 _{Write: R}
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
R R = Reserved
Figure 5. TIMA Counter Registers (TCNTH and TCNTL)
TIMA Counter
Modulo Registers
The read/write TIMA modulo registers contain the modulo value for the
TIMA counter. When the TIMA counter reaches the modulo value, the
overflow flag (TOF) becomes set, and the TIMA counter resumes
counting from $0000 at the next clock. Writing to the high byte
(TAMODH) inhibits the TOF bit and overflow interrupts until the low byte
(TAMODL) is written. Reset sets the TIMA counter modulo registers.
Bit 7
6
5
4
3
2
1
Bit 0
TAMODH
$0024
Read:
BIT 15
Write:
BIT 14
BIT 13
BIT 12
BIT 11
BIT 10
BIT 9
BIT 8
Reset: 1
1
1
1
1
1
1
1
Bit 7
6
5
4
3
2
1
Bit 0
TAMODL
$0025
Read:
BIT 7
Write:
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Reset: 1
1
1
1
1
1
1
1
Figure 6. TIMA Counter Modulo Registers
(TAMODH and TAMODL)
NOTE: Reset the TIMA counter before writing to the TIMA counter modulo
registers.
21-tima6
MOTOROLA
Appendix B: TIMA-6
MC68HC08AZ32
477