MC68HC08AZ16 Datasheet, PDF (193/527 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Serial Communications Interface Module (SCI)
WAKE — wake-up condition bit
This read/write bit determines which condition wakes up the SCI: a ’1’
(address mark) in the most significant bit position of a received
character or an idle condition on the PTE1/RxD pin. Reset clears the
WAKE bit.
1 = Address mark wake-up
0 = Idle line wake-up
ILTY — Idle line type bit
This read/write bit determines when the SCI starts counting ’1’s as
idle character bits. The counting begins either after the start bit or after
the stop bit. If the count begins after the start bit, then a string of ’1’s
preceding the stop bit may cause false recognition of an idle
character. Beginning the count after the stop bit avoids false idle
character recognition, but requires properly synchronized
transmissions. Reset clears the ILTY bit.
1 = Idle character bit count begins after stop bit
0 = Idle character bit count begins after start bit
PEN — Parity enable bit
This read/write bit enables the SCI parity function (see Table 7).
When enabled, the parity function inserts a parity bit in the most
significant bit position (seeFigure 6). Reset clears the PEN bit.
1 = Parity function enabled
0 = Parity function disabled
PTY — Parity bit
This read/write bit determines whether the SCI generates and checks
for odd parity or even parity (see Table 7). Reset clears the PTY bit.
1 = Odd parity
0 = Even parity
NOTE: Changing the PTY bit in the middle of a transmission or reception can
generate a parity error.
MC68HC08AZ32
192
Serial Communications Interface Module (SCI)
24-sci
MOTOROLA