MC68HC08AZ16 Datasheet, PDF (197/527 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Serial Communications Interface Module (SCI)
RWU — Receiver wake-up bit
This read/write bit puts the receiver in a standby state during which
receiver interrupts are disabled. The WAKE bit in SCC1 determines
whether an idle input or an address mark brings the receiver out of the
standby state and clears the RWU bit. Reset clears the RWU bit.
1 = Standby state
0 = Normal operation
SBK — Send break bit
Setting and then clearing this read/write bit transmits a break
character followed by a ’1’. The ’1’ after the break character
guarantees recognition of a valid start bit. If SBK remains set, the
transmitter continuously transmits break characters with no ’1’s
between them. Reset clears the SBK bit.
1 = Transmit break characters
0 = No break characters being transmitted
NOTE:
Do not toggle the SBK bit immediately after setting the SCTE bit.
Toggling SBK too early causes the SCI to send a break character
instead of a preamble.
SCI control register
3 (SCC3)
SCI control register 3 does the following:
• Stores the ninth SCI data bit received and the ninth SCI data bit to
be transmitted
• Enables SCI receiver full (SCRF) DMA service requests
• Enables SCI transmitter empty (SCTE) DMA service requests
• Enables the following interrupts:
– Receiver overrun interrupts
– Noise error interrupts
– Framing error interrupts
– Parity error interrupts
MC68HC08AZ32
196
Serial Communications Interface Module (SCI)
28-sci
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