MC68HC08AZ16 Datasheet, PDF (104/527 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Clock Generator Module (CGM)
Functional description
• Software must wait a given time, t_AL, after entering tracking mode
before selecting the PLL as the clock source to CGMOUT (BCS =
1).
• The LOCK bit is disabled.
• CPU interrupts from the CGM are disabled.
Programming the
PLL
The following procedure shows how to program the PLL.
NOTE: The round function in the following equations means that the real
number should be rounded to the nearest integer number.
1. Choose the desired bus frequency, f_BUSDES.
2. Calculate the desired VCO frequency (four times the
desired bus frequency).
f_VCLKDES = 4 X f_BUSDES
3. Choose a practical PLL reference frequency, f_RCLK.
4. Select a VCO frequency multiplier, N.
N = round ^fVCLKDES
f_RCLK
5. Calculate and verify the adequacy of the VCO and bus
frequencies f_VCLK and f_BUS.
f_VCLK = N x f_RCLK
f_BUS = (f_VCLK)/4
9-cgm
MOTOROLA
Clock Generator Module (CGM)
MC68HC08AZ32
103