MC68HC08AZ16 Datasheet, PDF(123/527 Page) Motorola, Inc – HCMOS Microcontroller Unit

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MC68HC08AZ16 Datasheet, PDF (123/527 Pages) Motorola, Inc – HCMOS Microcontroller Unit

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Clock Generator Module (CGM)

lower size may seem attractive for acquisition time improvement, but the

PLL may become unstable. Also, always choose a capacitor with a tight

tolerance (Â±20% or better) and low dissipation.

Reaction time

calculation

The actual acquisition and lock times can be calculated using the

equations below. These equations yield nominal values under the

following conditions:

â¢ Correct selection of filter capacitor, CF, (see Choosing a filter

capacitor on page 121).

â¢ Room temperature operation

â¢ Negligible external leakage on CGMXFC

â¢ Negligible noise

The K factor in the equations is derived from internal PLL parameters.

KACQ is the K factor when the PLL is configured in acquisition mode, and

KTRK is the K factor when the PLL is configured in tracking mode. See

Acquisition and tracking modes on page 101

tACQ

=

ï£ï£«V--f--R-D-D--D-V-A-

ï£¶

ï£¸

ï£ï£«-K----A8--C---Q-

ï£¶

ï£¸

tAL

=

ï£«

ï£

V--f--R-D-D--D-V-A-ï£¸ï£¶

ï£«

ï£

-K----4T--R---K-

ï£¶

ï£¸

MC68HC08AZ32

122

tLOCK = tACQ + tAL

Note the inverse proportionality between the lock time and the reference

frequency.

In automatic bandwidth control mode the acquisition and lock times are

quantized into units based on the reference frequency. <blue>See

Manual and automatic PLL bandwidth modes. A certain number of clock

Clock Generator Module (CGM)

28-cgm

MOTOROLA

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