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MC68HC08AZ16 Datasheet, PDF (397/527 Pages) Motorola, Inc – HCMOS Microcontroller Unit
◁
SpeciÞcations
5.0 Volt DC Electrical Characteristics
Charateristic
Output High Voltage
(ILOAD = –2.0 mA) All Ports and EBI pins
Output Low Voltage
(ILOAD = 1.6 mA) All Ports and EBI pins
Input High Voltage
All Ports,EBI pins,IRQs, RESET, OSC1
Input Low Voltage
All Ports, EBI pins,IRQs, RESET, OSC1
VDD + VDDA Supply Current
Run (see Note 3)
Wait (see Note 4)
Stop (see Note 5)
25 °C
–40 °C to +125 °C
25 °C with LVI Enabled
–40 °C to +125 °C with LVI Enabled
I/O Ports Hi-Z Leakage Current
Input Current
Capacitance
Ports (As Input or Output)
Low-Voltage Reset Inhibit
Low-Voltage Reset Inhibit/Recover Hysteresis
POR ReArm Voltage (see Note 6)
POR Reset Voltage (see Note 7)
POR Rise Time Ramp Rate (see Note 8)
High COP Disable Voltage (see Note 9)
Symbol
VOH
VOL
VIH
VIL
Min
Typ
VDD –0.8
—
Max
—
—
—
0.4
0.7 x VDD
—
VDD
VSS
—
0.3 x VDD
IDD
IL
IIN
COUT
CIN
VLVII
HLVI
VPOR
VPORRST
RPOR
VHI
—
—
—
—
—
—
—
—
—
—
---
—
0
0
0.02
VDD
24
28
12
14
20
100
50
150
300
500
400
600
—
±1
—
±1
—
12
—
8
4.2
—
200
—
—
200
—
800
—
—
VDD + 2
1.VDD = 5.0 Vdc ± 0.5v, VSS = 0 Vdc, TA = –40 °C to +85 °C, unless otherwise noted.
2.Typical values reflect average measurements at midpoint of voltage range, 25 °C only.
3.Run (Operating) IDD measured using external square wave clock source (fOP = 8.4 MHz). All inputs 0.2 V from rail.
No dc loads. Less than 100 pF on all outputs. CL = 20 pF on OSC2. All ports configured as inputs. OSC2 capaci-
tance linearly affects run IDD. Measured with all modules enabled.
4.Wait IDD measured using external square wave clock source (fOP = 8.4 MHz). All inputs 0.2 Vdc from rail. No dc
loads. Less than 100 pF on all outputs, CL = 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance
linearly affects wait IDD. Measured with all modules enabled.
5.Stop IDD measured with OSC1 = VSS.
6.Maximum is highest voltage that POR is guaranteed.
7.Maximum is highest voltage that POR is possible.
8.If minimum VDD is not reached before the internal POR reset is released, RST must be driven low externally until
minimum VDD is reached.
9.See Computer Operating Properly Module (COP) on page 149.
Unit
V
V
V
V
mA
mA
µA
µA
µA
µA
µA
µA
pF
V
mV
mV
mV
V/ms
V
MC68HC08AZ32
396
Specifications
4-specs
MOTOROLA
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