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MC68HC08AZ16 Datasheet, PDF (105/527 Pages) Motorola, Inc – HCMOS Microcontroller Unit
Clock Generator Module (CGM)
6. Select a VCO linear range multiplier, L.
L = round
fVCLK
fNOM
NOTE:
where fNOM = 4.9152MHz
7. Calculate and verify the adequacy of the VCO programmed
center-of-range frequency fVRS.
fVRS = (L)fNOM
8. Verify the choice of N and L by comparing fVCLK to fVRS and
fVCLKDES. For proper operation, fVCLK must be within the
application’s tolerance of fVCLKDES, and fVRS must be as close
as possible to fVCLK.
Exceeding the recommended maximum bus frequency or VCO
frequency can cause the MCU to “crash”.
9. Program the PLL registers accordingly:
a. In the upper 4 bits of the PLL programming register
(PPG), program the binary equivalent of N.
b. In the lower 4 bits of the PLL programming register
(PPG), program the binary equivalent of L.
MC68HC08AZ32
104
Clock Generator Module (CGM)
10-cgm
MOTOROLA