MC68HC908GR16 Datasheet, PDF (82/310 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Configuration Register (CONFIG)
Address:
Read:
Write:
Reset:
$001E
Bit 7
6
5
4
3
2
1
0
0
0
0
R
TMCLK- OSCEN-
SEL INSTOP
0
0
0
0
0
0
0
= Unimplemented
R
= Reserved
Figure 5-1. Configuration Register 2 (CONFIG2)
Bit 0
SCIBD-
SRC
1
Address: $001F
Bit 7
6
5
4
Read:
COPRS LVISTOP LVIRSTD LVIPWRD
Write:
Reset:
0
0
0
0
Note: LVI5OR3 bit is only reset via POR (power-on reset)
3
LVI5OR3
See note
2
SSREC
0
1
STOP
0
Figure 5-2. Configuration Register 1 (CONFIG1)
Bit 0
COPD
0
TMCLKSEL— Timebase Clock Select Bit
TMCLKSEL enables an extra divide-by-128 prescaler in the timebase module.
Setting this bit enables the extra prescaler and clearing this bit disables it. See
Section 4. Clock Generator Module (CGM) for a more detailed description of
the external clock operation.
1 = Enables extra divide-by-128 prescaler in timebase module
0 = Disables extra divide-by-128 prescaler in timebase module
OSCENINSTOP — Oscillator Enable In Stop Mode Bit
OSCENINSTOP, when set, will enable oscillator to continue to generate clocks
in stop mode. See Section 4. Clock Generator Module (CGM). This function
is used to keep the timebase running while the reset of the MCU stops. See
Section 17. Timebase Module (TBM). When clear, oscillator will cease to
generate clocks while in stop mode. The default state for this option is clear,
disabling the oscillator in stop mode.
1 = Oscillator enabled to operate during stop mode
0 = Oscillator disabled during stop mode (default)
SCIBDSRC — SCI Baud Rate Clock Source Bit
SCIBDSRC controls the clock source used for the serial communications
interface (SCI). The setting of this bit affects the frequency at which the SCI
operates.See Section 14. Enhanced Serial Communications Interface
(ESCI) Module.
1 = Internal data bus clock used as clock source for SCI (default)
0 = External oscillator used as clock source for SCI
Data Sheet
82
Configuration Register (CONFIG)
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MC68HC908GR16 — Rev. 1.0
MOTOROLA