MC68HC908GR16 Datasheet, PDF (185/310 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Enhanced Serial Communications Interface (ESCI) Module
I/O Registers
14.8.6 ESCI Data Register
The ESCI data register (SCDR) is the buffer between the internal data bus and the
receive and transmit shift registers. Reset has no effect on data in the ESCI data
register.
Address: $0018
Bit 7
6
5
4
3
2
1
Bit 0
Read: R7
R6
R5
R4
R3
R2
R1
R0
Write: T7
T6
T5
T4
T3
T2
T1
T0
Reset:
Unaffected by reset
Figure 14-16. ESCI Data Register (SCDR)
NOTE:
R7/T7:R0/T0 — Receive/Transmit Data Bits
Reading address $0018 accesses the read-only received data bits, R7:R0.
Writing to address $0018 writes the data to be transmitted, T7:T0. Reset has no
effect on the ESCI data register.
Do not use read-modify-write instructions on the ESCI data register.
14.8.7 ESCI Baud Rate Register
The ESCI baud rate register (SCBR) together with the ESCI prescaler register
selects the baud rate for both the receiver and the transmitter.
NOTE: There are two prescalers available to adjust the baud rate. One in the ESCI baud
rate register and one in the ESCI prescaler register.
Address:
Read:
Write:
Reset:
$0019
Bit 7
6
5
4
3
2
1
LINT
LINR
SCP1
SCP0
R
SCR2
SCR1
0
0
0
0
0
0
0
= Unimplemented
R
= Reserved
Figure 14-17. ESCI Baud Rate Register (SCBR)
Bit 0
SCR0
0
LINT — LIN Break Symbol Transmit Enable
This read/write bit selects the enhanced ESCI features for master nodes in the
local interconnect network (LIN) protocol (version 1.2) as shown in Table 14-6.
Reset clears LINT.
MC68HC908GR16 — Rev. 1.0
MOTOROLA
Enhanced Serial Communications Interface (ESCI) Module
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Data Sheet
185