MC68HC908GR16 Datasheet, PDF (248/310 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Timer Interface Module (TIM)
NOTE:
then an internal pullup device may be enabled for that channel. See 12.5.3 Port D
Input Pullup Enable Register.
Figure 18-3 summarizes the timer registers.
References to either timer 1 or timer 2 may be made in the following text by omitting
the timer number. For example, TSC may generically refer to both T1SC and
T2SC.
Addr.
Register Name
$0020
Timer 1 Status and Control ^Read:
Register (T1SC) Write:
See page 256. _Reset:
$0021
Timer 1 Counter ^Read:
Register High (T1CNTH) Write:
See page 258. _Reset:
$0022
Timer 1 Counter ^Read:
Register Low (T1CNTL) Write:
See page 258. _Reset:
$0023
Timer 1 Counter Modulo ^Read:
Register High (T1MODH) Write:
See page 258. _Reset:
$0024
Timer 1 Counter Modulo ^Read:
Register Low (T1MODL) Write:
See page 259. _Reset:
Timer 1 Channel 0 Status and ^Read:
$0025 Control Register (T1SC0) Write:
See page 259. _Reset:
$0026
Timer 1 Channel 0 ^Read:
Register High (T1CH0H) Write:
See page 262. _Reset:
$0027
Timer 1 Channel 0 ^Read:
Register Low (T1CH0L) Write:
See page 262. _Reset:
Timer 1 Channel 1 Status and ^Read:
$0028 Control Register (T1SC1) Write:
See page 259. _Reset:
$0029
Timer 1 Channel 1 ^Read:
Register High (T1CH1H) Write:
See page 262. _Reset:
Bit 7
TOF
0
0
Bit 15
0
Bit 7
0
Bit 15
1
Bit 7
1
CH0F
0
0
Bit 15
Bit 7
CH1F
0
0
Bit 15
6
5
4
3
2
0
0
TOIE TSTOP
PS2
TRST
0
1
0
0
0
14
13
12
11
10
0
0
0
0
0
6
5
4
3
2
0
0
0
0
0
14
13
12
11
10
1
1
1
1
1
6
5
4
3
2
1
1
1
1
1
CH0IE MS0B MS0A ELS0B ELS0A
0
0
0
0
0
14
13
12
11
10
Indeterminate after reset
6
5
4
3
2
CH1IE
Indeterminate after reset
0
MS1A ELS1B ELS1A
0
0
0
0
0
14
13
12
11
10
= Unimplemented
Indeterminate after reset
Figure 18-3. TIM I/O Register Summary (Sheet 1 of 2)
1
Bit 0
PS1
PS0
0
0
9
Bit 8
0
0
1
Bit 0
0
9
1
1
1
TOV0
0
9
0
Bit 8
1
Bit 0
1
CH0MAX
0
Bit 8
1
Bit 0
TOV1
0
9
CH1MAX
0
Bit 8
Data Sheet
248
Timer Interface Module (TIM)
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MC68HC908GR16 — Rev. 1.0
MOTOROLA