MC68HC908GR16 Datasheet, PDF (241/310 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Timebase Module (TBM)
TBM Interrupt Rate
17.5 TBM Interrupt Rate
The interrupt rate is determined by the equation:
tTBMRATE
=
---------------1-----------------
fTBMRATE
=
----D-----i-v----i-d----e----r----
fTBMCLK
where:
f_TBMCLK = Frequency supplied from the clock generator (CGM) module
Divider = Divider value as determined by TBR2–TBR0 settings,
see Table 17-1
Table 17-1. Timebase Divider Selection
TBR2
0
0
0
0
1
1
1
1
TBR1
0
0
1
1
0
0
1
1
TBR0
0
1
0
1
0
1
0
1
Divider Tap
TMBCLKSEL
0
1
32,768
4,194,304
8192
1,048,576
2048
262144
128
16,384
64
8192
32
4096
16
2048
8
1024
NOTE:
As an example, a clock source of 4.9152 MHz, with the TMCLKSEL set for
divide-by-128 and the TBR2–TBR0 set to {011}, the divider tap is1 and the interrupt
rate calculates to:
1/(4.9152 x 10⁶/128) = 26 µs
Do not change TBR2–TBR0 bits while the timebase is enabled (TBON = 1).
17.6 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power- consumption standby
modes.
17.6.1 Wait Mode
The timebase module remains active after execution of the WAIT instruction. In
wait mode the timebase register is not accessible by the CPU.
If the timebase functions are not required during wait mode, reduce the power
consumption by stopping the timebase before executing the WAIT instruction.
MC68HC908GR16 — Rev. 1.0
MOTOROLA
Timebase Module (TBM)
For More Information On This Product,
Go to: www.freescale.com
Data Sheet
241